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arXiv:2110.07906

Hardware Architecture of Layered Decoders for PLDPC-Hadamard Codes

Peng-Wei Zhang, Francis C. M. Lau, Chiu‐Wing Sham

Published Oct 15, 2021• 0 citations
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Abstract

Protograph-based low-density parity-check Hadamard codes (PLDPC-HCs) are a new type of ultimate-Shannon-limit-approaching codes. In this paper, we propose a hardware architecture for the PLDPC-HC layered decoders. The decoders consist mainly of random address memories, Hadamard sub-decoders and control logics. Two types of pipelined structures are presented and the latency and throughput of these two structures are derived. Implementation of the decoder design on an FPGA board shows that a throughput of $1.48$ Gbps is achieved with a bit error rate (BER) of $10^{-5}$ at around $E_b/N_0 = - 0.40$ dB. The decoder can also achieve the same BER at $E_b/N_0 = - 1.14$ dB with a reduced throughput of $0.20$ Gbps.

DOI
10.48550/arxiv.2110.07906

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Protograph-based low-density parity-check Hadamard codes (PLDPC-HCs) are a new type of ultimate-Shannon-limit-approaching codes. In this paper, we propose a hardware architecture for the PLDPC-HC layered decoders. The decoders consist mainly of random address memories, Hadamard sub-decoders and control logics. Two types of pipelined structures are presented and the latency and throughput of these two structures are derived. Implementation of the decoder design on an FPGA board shows that a throughput of 1.481.481.48 Gbps is achieved with a bit error rate (BER) of 10−510^{-5}10−5 at around Eb/N0=−0.40E_b/N_0 = - 0.40Eb​/N0​=−0.40 dB. The decoder can also achieve the same BER at Eb/N0=−1.14E_b/N_0 = - 1.14Eb​/N0​=−1.14 dB with a reduced throughput of 0.200.200.20 Gbps.
Protograph-based low-density parity-check Hadamard codes (PLDPC-HCs) are a new type of ultimate-Shannon-limit-approaching codes. In this paper, we propose a hardware architecture for the PLDPC-HC layered decoders. The decoders consist mainly of random address memories, Hadamard sub-decoders and control logics. Two types of pipelined structures are presented and the latency and throughput of these two structures are derived. Implementation of the decoder design on an FPGA board shows that a throughput of 1.48 Gbps is achieved with a bit error rate (BER) of10−510^{-5}10−5at aroundEb/N0=−0.40E_{b}/N_{0}=-0.40Eb​/N0​=−0.40dB. The decoder can also achieve the same BER atEb/N0=−1.14E_{b}/N_{0}=-1.14Eb​/N0​=−1.14dB with a reduced throughput of 0.20 Gbps.
In this paper, we propose a new method to design low-density parity-check Hadamard (LDPC-Hadamard) codes, a type of ultimate-Shannon-limit approaching channel codes. The technique is based on applying Hadamard constraints to the check nodes in a generalized protograph-based LDPC code, followed by lifting the generalized protograph. We name the codes formed protograph-based LDPC Hadamard (PLDPC-Hadamard) codes. We also propose a modified Protograph Extrinsic Information Transfer (PEXIT) algorithm for analyzing and optimizing PLDPC-Hadamard code designs. The proposed algorithm further allows the analysis of PLDPC-Hadamard codes with degree-1 and/or punctured nodes. We find codes with decoding thresholds ranging from -1.53 dB to -1.42 dB. At a BER of 1e-5, the gaps of our codes to the ultimate-Shannon-limit range from 0.40 dB (for rate = 0.0494) to 0.16 dB (for rate = 0.003). Moreover, the error performance of our codes is comparable to that of the traditional LDPC-Hadamard codes. Finally, the BER performances of our codes after puncturing are simulated and compared.
In this letter, we propose a layered decoding algorithm for protograph-based low-density parity-check Hadamard codes (PLDPC-HCs), which have been shown to be ultimate-Shannon-limit approaching. Compared with the standard decoding algorithm, the layered decoding algorithm improves the convergence rate by about two times. At a bit error rate of 2.0×10-5, the layered decoder using 20 decoding iterations shows a very small degradation of 0.03 dB compared with the standard decoder using 40 decoding iterations. Moreover, the layered decoder using 21 decoding iterations shows the same error performance as the standard decoder using 41 decoding iterations.
We propose a new type of ultimate-Shannon-limit-approaching codes called spatially coupled protograph-based low-density parity-check Hadamard convolutional codes (SC-PLDPCH-CCs), which are constructed by spatially coupling PLDPC-Hadamard block codes. We develop an efficient decoding algorithm that combines pipeline decoding and layered scheduling for the decoding of SC-PLDPCH-CCs, and analyze the latency and complexity of the decoder. To estimate the decoding thresholds of SC-PLDPCHCCs, we first propose a layered protograph extrinsic information transfer (PEXIT) algorithm to evaluate the thresholds of spatially coupled PLDPC-Hadamard terminated codes (SC-PLDPCH-TDCs) with a moderate coupling length. With the use of the proposed layered PEXIT method, we develop a genetic algorithm to find good SC-PLDPCH-TDCs in a systematic way. Then we extend the coupling length of these SC-PLDPCH-TDCs to form good SC-PLDPCH-CCs. Results show that our constructed SC-PLDPCH-CCs can achieve comparable thresholds to the block code counterparts. Simulations illustrate the superiority of the SC-PLDPCH-CCs over the block code counterparts and other state-of-the-art low-rate codes in terms of error performance. For the rate-0.00295 SC-PLDPCH-CC, a bit error rate of 1e-5 is achieved at Eb/N0 = -1.465 dB, which is only 0.125 dB from the ultimate Shannon limit.
We propose a new type of ultimate-Shannon-limit-approaching codes called spatially coupled protograph-based low-density parity-check Hadamard convolutional codes (SC-PLDPCH-CCs), which are constructed by spatially coupling PLDPC-Hadamard block codes. We develop an efficient decoding algorithm that combines pipeline decoding and layered scheduling for the decoding of SC-PLDPCH-CCs, and analyze the latency and complexity of the decoder. To estimate the decoding thresholds of SC-PLDPCH-CCs, we first propose a layered protograph extrinsic information transfer (PEXIT) algorithm to evaluate the thresholds of spatially coupled PLDPC-Hadamard terminated codes (SC-PLDPCH-TDCs) with a moderate coupling length. With the use of the proposed layered PEXIT method, we develop a genetic algorithm to find good SC-PLDPCH-TDCs in a systematic way. Then we extend the coupling length of these SC-PLDPCH-TDCs to form good SC-PLDPCH-CCs. Results show that our constructed SC-PLDPCH-CCs can achieve comparable thresholds to the block code counterparts. Simulations illustrate the superiority of the SC-PLDPCH-CCs over the block code counterparts and other state-of-the-art low-rate codes in terms of error performance. For the rate-0.00295 SC-PLDPCH-CC, a bit error rate of 10−5is achieved atEb/N0=−1.465E_{b}/N_{0} = -1.465Eb​/N0​=−1.465dB, which is only 0.125 dB from the ultimate Shannon limit.
In this paper, we propose a new method to design low-density parity-check Hadamard (LDPC-Hadamard) codes — a type of ultimate-Shannon-limit approaching channel codes. The technique is based on applying Hadamard constraints to the check nodes in a generalized protograph-based LDPC code, followed by lifting the generalized protograph. We name the codes formedprotograph-basedLDPC Hadamard (PLDPC-Hadamard) codes. We also propose a modified Protograph Extrinsic Information Transfer (PEXIT) algorithm for analyzing and optimizing PLDPC-Hadamard code designs. The proposed algorithm further allows the analysis of PLDPC-Hadamard codes with degree- 1 and/or punctured nodes. We find codes with decoding thresholds ranging from −1.53 dB to −1.42 dB. At a BER of 10−5, the gaps of our codes to the ultimate-Shannon-limit range from 0.40 dB (for rate = 0.0494) to 0.16 dB (for rate = 0.003). Moreover, the error performance of our codes is comparable to that of the traditional LDPC-Hadamard codes. Finally, the BER performances of our codes after puncturing are simulated and compared.