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arXiv:2109.04792 · IEEE Transactions on Quantum Engineering

Timing Constraints Imposed by Classical Digital Control Systems on Photonic Implementations of Measurement-Based Quantum Computing

John R. Scott, Krishna C. Balram

Published Jan 1, 2022• 16 citations
arXivHTMLPDF

Abstract

Most of the architectural research on photonic implementations of measurement-based quantum computing (MBQC) has focused on the quantum resources involved in the problem with the implicit assumption that these will provide the main constraints on system scaling. However, the ‘flying-qubit’ architecture of photonic MBQC requires specific timing constraints that need to be met by the classical control system. This classical control includes, for example: the amplification of the signals from single-photon detectors to voltage levels compatible with digital systems; the implementation of a control system which converts measurement outcomes into basis settings for measuring subsequent cluster qubits, in accordance with the quantum algorithm being implemented; and the digital-to-analog converter (DAC) and amplifier systems required to set these measurement bases using a fast phase modulator. In this paper, we analyze the digital system needed to implement arbitrary one-qubit rotations and controlled-NOT (CNOT) gates in discrete-variable photonic MBQC, in the presence of an ideal cluster state generator, with the main aim of understanding the timing constraints imposed by the digital logic on the analog system and quantum hardware. We have verified that the design works using functional simulations, and have used static timing analysis of a Xilinx FPGA (7 series) to provide a practical upper bound on the speed at which the adaptive measurement processing can be performed, in turn constraining the photonic clock rate of the system. The design and testing system is freely available, for use as the basis of analysis of more complex designs, incorporating more recent proposals for photonic quantum computing.} Our work points to the importance of co-designing the classical control system in tandem with the quantum system in order to meet the challenging specifications of a photonic quantum computer.

DOI
10.1109/tqe.2022.3175587

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Most of the architectural research on photonic implementations of measurement-based quantum computing (MBQC) has focused on the quantum resources involved in the problem with the implicit assumption that these will provide the main constraints on system scaling. However, the ‘flying-qubit’ architecture of photonic MBQC requires specific timing constraints that need to be met by the classical control system. This classical control includes, for example: the amplification of the signals from single-photon detectors to voltage levels compatible with digital systems; the implementation of a control system which converts measurement outcomes into basis settings for measuring subsequent cluster qubits, in accordance with the quantum algorithm being implemented; and the digital-to-analog converter (DAC) and amplifier systems required to set these measurement bases using a fast phase modulator. In this paper, we analyze the digital system needed to implement arbitrary one-qubit rotations and controlled-NOT (CNOT) gates in discrete-variable photonic MBQC, in the presence of an ideal cluster state generator, with the main aim of understanding the timing constraints imposed by the digital logic on the analog system and quantum hardware. We have verified that the design works using functional simulations, and have used static timing analysis of a Xilinx FPGA (7 series) to provide a practical upper bound on the speed at which the adaptive measurement processing can be performed, in turn constraining the photonic clock rate of the system. The design and testing system is freely available, for use as the basis of analysis of more complex designs, incorporating more recent proposals for photonic quantum computing.} Our work points to the importance of co-designing the classical control system in tandem with the quantum system in order to meet the challenging specifications of a photonic quantum computer.
Understanding the computational overheads imposed by classical control systems on quantum computing platforms becomes critically important as these quantum machines grow in scale and complexity. In this work, we calculate the overheads imposed by the implementation of real-time graph traversal algorithms needed to find computational paths through incomplete cluster states for the implementation of one-qubit gates; a necessary requirement for a realistic implementation of photonic measurement-based quantum computing. By implementing two different algorithms, a global breadth-first search that searches the entire cluster state and an incremental version that traverses a narrow subsection of the cluster state, we analyze the trade-off between the accuracy of finding viable paths and the speed at which this operation can be performed, which constrains the overall photonic clock cycle of the system. We also outline the broader implications of our results for implementing classical control systems for measurement-based photonic quantum computing.
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Continuous-variable (CV) photonics can generate trillions of time-multiplexed modes, but the resource requirements of its classical control stack - particularly the real-time decoders-have not yet been quantified. Here we present the first co-design study that bridges CV-photonic measurement-based quantum computing (MBQC) with CMOS control hardware. We implement a Union-Find surface-code decoder targeting an ASIC and, by evaluating its error-correction performance, silicon area, and decoding time as functions of code distance, we derive insights that lay the groundwork for future system development.
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Fault-tolerant quantum computing requires architectures that simultaneously address scalability, connectivity, and error correction under realistic noise constraints. We present a compound photonic-atomic quantum computing platform that uses cavity QED to realize near-deterministic entangling operations between flying photonic qubits and stationary atomic qubits. Photons provide long-range connectivity and scalability via measurement-based quantum computing (MBQC), while atoms supply reusable, near-deterministic resources for photon generation and entanglement, overcoming the inefficiency of purely photonic platforms. The core primitive is a symmetrized Duan-Kimble photon-atom controlled-phase (CZ) gate, robust to experimental imperfections and high-fidelity. Using single 87^{87}87Rb atoms coupled to optical cavities, we give protocols for state preparation, measurement, photon generation, and entangling gates on tens-of-nanosecond timescales, and show how large-scale cluster states with effectively unrestricted connectivity and reduced overhead can be generated through atomic reuse. We analyze fault tolerance on the Raussendorf-Harrington-Goyal (RHG) lattice with a hardware-aware noise model capturing asymmetric loss and correlated photonic-atomic errors. Logical memory simulations yield a photon-loss threshold near 2.6%2.6\%2.6% per physical gate ($\sim$15\% total per trajectory). The full Clifford set -- Hadamard, phase, CNOT -- is implementable transversally or fold-transversally at thresholds matching the identity channel, and we propose two non-Clifford resource-state routes (code teleportation and magic state cultivation) within the foliated cluster-state architecture.
In this paper we present a flexible, high-performance, integrated qubit control system using modular PXIe equipment. To manipulate qubits, a classical control system is required to generate and acquire a mix of baseband, radio frequency, and/or optical signals, with the specific mix different for each qubit technology. Typically, a quantum system requires many of these signals with a high degree of synchronization and phase coherence, and increasingly needs real-time data processing and on-the-fly sequencing capabilities for feedback experiments. The proposed system is scalable to hundreds of channels, all of them being phase coherent and fully time-synchronized.The system includes a programmable real-time sequencer for precise execution timing and decision making; and open FPGA capabilities for custom Digital Signal Processing (DSP) by hardware. Using the latter, we present FPGA IP to generate one-/two-qubit gates efficiently with the AWG, and to analyze high-frequency signals to measure the qubit states in real time on the digitizers. This IP features very low latencies for Quantum Error Correction (QEC) and Frequency Division Multiplexing (FDM) capabilities, among others.