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arXiv:2104.09539 · PRX Quantum

Practical Quantum Error Correction with the XZZX Code and Kerr-Cat Qubits

Andrew S. Darmawan, Benjamin J. Brown, Arne L. Grimsmo, David K. Tuckett, Shruti Puri

Published Sep 16, 2021• 134 citations
arXivHTMLPDF

Abstract

The development of robust architectures capable of large-scale fault-tolerant quantum computation should consider both their quantum error-correcting codes and the underlying physical qubits upon which they are built, in tandem.Following this design principle, we demonstrate remarkable error-correction performance by concatenating the XZZX surface code with Kerr-cat qubits.We contrast several variants of fault-tolerant systems undergoing different circuit-noise models that reflect the physics of Kerr-cat qubits.Our simulations show that our system is scalable below a threshold gate infidelity of p CX ∼ 6.5% within a physically reasonable parameter regime, where p CX is the infidelity of the noisiest gate of our system, the controlled-NOT gate.This threshold can be reached in a superconducting-circuit architecture with a Kerr nonlinearity of 10MHz, an approximately 6.25-photon cat qubit, single-photon lifetime of 64 μs, and a thermal photon population 8%.Such parameters are routinely achieved in superconducting circuits.

DOI
10.1103/prxquantum.2.030345

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The development of robust architectures capable of large-scale fault-tolerant quantum computation should consider both their quantum error-correcting codes and the underlying physical qubits upon which they are built, in tandem.Following this design principle, we demonstrate remarkable error-correction performance by concatenating the XZZX surface code with Kerr-cat qubits.We contrast several variants of fault-tolerant systems undergoing different circuit-noise models that reflect the physics of Kerr-cat qubits.Our simulations show that our system is scalable below a threshold gate infidelity of p CX ∼ 6.5% within a physically reasonable parameter regime, where p CX is the infidelity of the noisiest gate of our system, the controlled-NOT gate.This threshold can be reached in a superconducting-circuit architecture with a Kerr nonlinearity of 10MHz, an approximately 6.25-photon cat qubit, single-photon lifetime of 64 μs, and a thermal photon population 8%.Such parameters are routinely achieved in superconducting circuits.
Abstract Performing large calculations with a quantum computer will likely require a fault-tolerant architecture based on quantum error-correcting codes. The challenge is to design practical quantum error-correcting codes that perform well against realistic noise using modest resources. Here we show that a variant of the surface code—the XZZX code—offers remarkable performance for fault-tolerant quantum computation. The error threshold of this code matches what can be achieved with random codes (hashing) for every single-qubit Pauli noise channel; it is the first explicit code shown to have this universal property. We present numerical evidence that the threshold even exceeds this hashing bound for an experimentally relevant range of noise parameters. Focusing on the common situation where qubit dephasing is the dominant noise, we show that this code has a practical, high-performance decoder and surpasses all previously known thresholds in the realistic setting where syndrome measurements are unreliable. We go on to demonstrate the favourable sub-threshold resource scaling that can be obtained by specialising a code to exploit structure in the noise. We show that it is possible to maintain all of these advantages when we perform fault-tolerant quantum computation.
Performing large calculations with a quantum computer will likely require a fault-tolerant architecture based on quantum error-correcting codes. The challenge is to design practical quantum error-correcting codes that perform well against realistic noise using modest resources. Here we show that a variant of the surface code-the XZZX code-offers remarkable performance for fault-tolerant quantum computation. The error threshold of this code matches what can be achieved with random codes (hashing) for every single-qubit Pauli noise channel; it is the first explicit code shown to have this universal property. We present numerical evidence that the threshold even exceeds this hashing bound for an experimentally relevant range of noise parameters. Focusing on the common situation where qubit dephasing is the dominant noise, we show that this code has a practical, high-performance decoder and surpasses all previously known thresholds in the realistic setting where syndrome measurements are unreliable. We go on to demonstrate the favourable sub-threshold resource scaling that can be obtained by specialising a code to exploit structure in the noise. We show that it is possible to maintain all of these advantages when we perform fault-tolerant quantum computation.
Quantum computing promises exponential advantages for simulating quantum systems and solving certain computational problems beyond the reach of classical computers, but the fragility of qubits and the resulting errors present a major challenge for scalable implementations. One promising approach is to engineer qubits whose physical noise processes are intrinsically biased, enabling more efficient quantum error correction. This dissertation investigates quantum computing with superconducting Kerr-cat qubits, a bosonic qubit architecture in which qubit states are encoded in coherent states of a nonlinear oscillator stabilized by a two-photon drive. This stabilization creates an effective double-well pseudo-potential that strongly suppresses bit-flip errors while enabling universal quantum control, leading to a noise-biased qubit. A superconducting device architecture based on SNAIL nonlinear oscillators is developed to realize Kerr-cat qubits with tunable parameters and high coherence, integrating readout resonators, dedicated filters, and microwave control lines for measurement and manipulation. Universal single-qubit gates are implemented using engineered single-photon and two-photon drives to deform the pseudo-potential, and a cat-quadrature readout method is employed to achieve high-fidelity quantum nondemolition measurement. The performance of the qubits is systematically characterized through lifetime measurements and benchmarking protocols, including quantum process tomography, gate set tomography, and dihedral randomized benchmarking, revealing a strongly biased noise structure with high performance. These results establish an experimental framework for the design, control, and characterization of Kerr-cat qubits and demonstrate their potential as hardware-efficient building blocks for scalable fault-tolerant quantum computing.
To solve problems of practical importance1,2, quantum computers probably need to incorporate quantum error correction, in which a logical qubit is redundantly encoded in many noisy physical qubits3–5. The large physical-qubit overhead associated with error correction motivates the search for more hardware-efficient approaches6–18. Here, using a superconducting quantum circuit19, we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance d = 5 (ref. 10). A stabilizing circuit passively protects cat qubits against bit flips20–24. The repetition code, using ancilla transmons for syndrome measurement, corrects cat qubit phase flips. We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below the threshold. The logical bit-flip error is suppressed with increasing cat qubit mean photon number, enabled by our realization of a cat-transmon noise-biased CX gate. The minimum measured logical error per cycle is on average 1.75(2)% for the distance-3 code sections, and 1.65(3)% for the distance-5 code. Despite the increased number of fault locations of the distance-5 code, the high degree of noise bias preserved during error correction enables comparable performance. These results, where the intrinsic error suppression of the bosonic encodings enables us to use a hardware-efficient outer error-correcting code, indicate that concatenated bosonic codes can be a compelling model for reaching fault-tolerant quantum computation. Bosonic qubits can be engineered to feature intrinsic protection against certain kinds of errors, which makes quantum error correction across many bosonic qubits possible with less overhead.
Abstract We show that a variant of the surface code—the XZZX code—offers remarkable performance for fault-tolerant quantum computation. The error threshold of this code matches what can be achieved with random codes (hashing) for every single-qubit Pauli noise channel; it is the first explicit code shown to have this universal property. We present numerical evidence that the threshold even exceeds this hashing bound for an experimentally relevant range of noise parameters. Focusing on the common situation where qubit dephasing is the dominant noise, we show that this code has a practical, high-performance decoder and surpasses all previously known thresholds in the realistic setting where syndrome measurements are unreliable. We go on to demonstrate the favorable sub-threshold resource scaling that can be obtained by specializing a code to exploit structure in the noise. We show that it is possible to maintain all of these advantages when we perform fault-tolerant quantum computation. We finally suggest some small-scale experiments that could exploit noise bias to reduce qubit overhead in two-dimensional architectures
Quantum computers are inherently noisy, and a crucial challenge for achieving large-scale, fault-tolerant quantum computing is to implement quantum error correction. A promising direction that has made rapid recent progress is to design hardware that has a specific noise profile, leading to a significantly higher threshold for noise with certain quantum error correcting codes. This Perspective focuses on erasure qubits, which enable hardware-efficient quantum error correction, by concatenating an inner code built-in to the hardware with an outer code. We focus on implementations of dual-rail encoded erasure qubits using superconducting qubits, giving an overview of recent developments in theory and simulation, and hardware demonstrators. We also discuss the differences between implementations; near-term applications using quantum error detection; and the open problems for developing this approach towards early fault-tolerant quantum computers.