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arXiv:2101.04474

Stochastic search for approximate compilation of unitaries

Ryan Shaffer

Published Jan 12, 2021• 1 citation
arXivHTMLPDF

Abstract

Compilation of unitaries into a sequence of physical quantum gates is a critical prerequisite for execution of quantum algorithms. This work introduces STOQ, a stochastic search protocol for approximate unitary compilation into a sequence of gates from an arbitrary gate alphabet. We demonstrate STOQ by comparing its performance to existing product-formula compilation techniques for time-evolution unitaries on system sizes up to eight qubits. The compilations generated by STOQ are less accurate than those from product-formula techniques, but they are similar in runtime and traverse significantly different paths in state space. We also use STOQ to generate compilations of randomly-generated unitaries, and we observe its ability to generate approximately-equivalent compilations of unitaries corresponding to shallow random circuits. Finally, we discuss the applicability of STOQ to tasks such as characterization of near-term quantum devices.

DOI
10.48550/arxiv.2101.04474

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Compilation of unitaries into a sequence of physical quantum gates is a critical prerequisite for execution of quantum algorithms. This work introduces STOQ, a stochastic search protocol for approximate unitary compilation into a sequence of gates from an arbitrary gate alphabet. We demonstrate STOQ by comparing its performance to existing product-formula compilation techniques for time-evolution unitaries on system sizes up to eight qubits. The compilations generated by STOQ are less accurate than those from product-formula techniques, but they are similar in runtime and traverse significantly different paths in state space. We also use STOQ to generate compilations of randomly-generated unitaries, and we observe its ability to generate approximately-equivalent compilations of unitaries corresponding to shallow random circuits. Finally, we discuss the applicability of STOQ to tasks such as characterization of near-term quantum devices.
Quantum unitary synthesis addresses the problem of translating abstract quantum algorithms into sequences of hardware-executable quantum gates. Solving this task exactly is infeasible in general due to the exponential growth of the underlying combinatorial search space. Existing approaches suffer from misaligned optimization objectives, substantial training costs and limited generalization across different qubit counts. We mitigate these limitations by using supervised learning to approximate the minimum description length of residual unitaries and combining this estimate with stochastic beam search to identify near optimal gate sequences. Our method relies on a lightweight model with zero-shot generalization, substantially reducing training overhead compared to prior baselines. Across multiple benchmarks, we achieve faster wall-clock synthesis times while exceeding state-of-the-art methods in terms of success rate for complex circuits.
We study a method of producing approximately diagonal 1-qubit gates. For each positive integer, the method provides a sequence of gates that are defined iteratively from a fixed diagonal gate and an arbitrary gate. These sequences are conjectured to converge to diagonal gates doubly exponentially fast and are verified for small integers. We systemically study this conjecture and prove several important partial results. Some techniques are developed to pave the way for a final resolution of the conjecture. The sequences provided here have applications in quantum search algorithms, quantum circuit compilation, generation of leakage-free entangled gates in topological quantum computing, etc.
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Quantum unitary synthesis addresses the problem of translating abstract quantum algorithms into sequences of hardware-executable quantum gates. Solving this task exactly is infeasible in general due to the exponential growth of the underlying combinatorial search space. Existing approaches suffer from misaligned optimization objectives, substantial training costs and limited generalization across different qubit counts. We mitigate these limitations by using supervised learning to approximate the minimum description length of residual unitaries and combining this estimate with stochastic beam search to identify near optimal gate sequences. Our method relies on a lightweight model with zero-shot generalization, substantially reducing training overhead compared to prior baselines. Across multiple benchmarks, we achieve faster wall-clock synthesis times while exceeding state-of-the-art methods in terms of success rate for complex circuits.
Approximate compilation of RAV inversion sequence via STOQSTOQ is a stochastic approximate compilation technique for compiling unitaries in terms of an arbitrary set of native gates, which may be fixed or parameterized. Verification of analog simulatorsError sensitivity Hardware requirements Scalability Time-reversal benchmarking Incoherent noise Implement time reversal of Hamiltonian Scalable to large n Cross-entropy benchmarking (XEB) Coherent errors, incoherent noise Implement programmable Hamiltonian terms Infeasible for n >> 50 Randomized analog verification (RAV) Coherent errors, incoherent noise Implement programmable Hamiltonian terms Infeasible for n >> 10 Verification of gate-based devices Building blocks Sequence generation
We present an algorithm for compiling arbitrary unitaries into a sequence of gates native to a quantum processor. As accurate CNOT gates are hard for the foreseeable Noisy- Intermediate-Scale Quantum devices era, our A* inspired algorithm attempts to minimize their count, while accounting for connectivity. We discuss the search strategy together with metrics to expand the solution frontier. For a workload of circuits with complexity appropriate for the NISQ era, we produce solutions well within the best upper bounds published in literature and match or exceed hand tuned implementations, as well as other existing synthesis alternatives. In particular, when comparing against state-of-the-art available synthesis packages we show 2.4x average (up to 5.3x) reduction in CNOT count. We also show how to re-target the algorithm for a different chip topology and native gate set, while obtaining similar quality results. We believe that empirical tools like ours can facilitate algorithmic exploration, gate set discovery for quantum processor designers, as well as providing useful optimization blocks within the quantum compilation tool-chain.