High-Fidelity Controlled- Z Gate with Maximal Intermediate Leakage Operating at the Speed Limit in a Superconducting Quantum Processor
Victor Negîrneac, Hany A. Ali, Nandini Muthusubramanian, Francesco Battistel, Ramiro Sagastizabal, M. S. Moreira, Jorge Marques, Wouter Vlothuizen, Marc Beekman, Christos Zachariadis, Nadia Haider, Alessandro Bruno, L. DiCarlo
Simple tuneup of fast two-qubit gates is essential for the scaling of quantum processors. We introduce the sudden variant (SNZ) of the net zero scheme realizing controlled-Z (CZ) gates by flux control of transmon frequency. SNZ CZ gates realized in a multitransmon processor operate at the speed limit of transverse coupling between computational and noncomputational states by maximizing intermediate leakage. Beyond speed, the key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.
Simple tuneup of fast two-qubit gates is essential for the scaling of quantum processors. We introduce the sudden variant (SNZ) of the net zero scheme realizing controlled-Z (CZ) gates by flux control of transmon frequency. SNZ CZ gates realized in a multitransmon processor operate at the speed limit of transverse coupling between computational and noncomputational states by maximizing intermediate leakage. Beyond speed, the key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.
Hybrid superconducting architectures combining different types of qubits offer a promising platform for exploiting their complementary advantages, yet high-fidelity entangling gates remain challenging because of strong nonlinearities and residual qubit-qubit interactions. Here, we propose a high-fidelity controlled-Z (CZ) gate for a hybrid circuit comprising a fluxonium qubit, a fixed-frequency transmon qubit, and a flux-tunable transmon coupler. By modulating only the external magnetic flux applied to the coupler, the qubit-qubit interaction is dynamically engineered for conditional-phase accumulation while the residual interaction is suppressed at idle, mitigating spectator-induced errors. We employ a low-dimensional Fourier-cosine pulse parameterization and a physically motivated cost function to independently suppress conditional-phase errors and leakage from the computational subspace. Numerical simulations demonstrate that a microwave-free CZ gate can be realized within 25ns, with an average gate fidelity exceeding 99.99% and leakage below 10−5. Using experimentally relevant superconducting-qubit parameters and accounting for decoherence, the proposed scheme maintains a CZ-gate fidelity of approximately 99.9%. We further extend the analysis to larger coupled architectures and find that the CZ-gate infidelity remains below 10−4 in the presence of spectator qubits. These results establish single-parameter flux control as a simple and robust approach for realizing high-fidelity entangling gates in heterogeneous superconducting quantum architectures.
Fault-tolerant quantum computing requires quantum gates that combine short duration, high fidelity, and robustness to noise. As quantum processors scale, robustness becomes increasingly important because exhaustive characterization and frequent recalibration of individual gates become impractical. We present a comprehensive optimal-control framework for controlled-Z (CZ) gates between directly coupled, frequency-tunable transmons that systematically accounts for intrinsic Hamiltonian errors and realistic decoherence mechanisms, including energy relaxation and dephasing. Using smooth, single-shot flux pulses, we obtain 12-ns CZ gates---close to the theoretical speed limit of 11.6 ns---with intrinsic errors suppressed to the 2×10−5 level. We construct dephasing noise models, calibrated against published experimental measurements, that capture fast dephasing from room-temperature control electronics and slow dephasing from 1/f flux noise. Using these models, we identify dephasing sweet spots that suppress sensitivity to dephasing noise. We further exploit transmon asymmetry as a design parameter to access distinct noise-resilient operating regimes. These results establish an experimentally applicable framework for balancing gate speed, fidelity, and noise robustness while reducing characterization and recalibration overhead.
Conditional-phase (cz) gates in transmons can be realized by flux pulsing computational states towards resonance with noncomputational ones. We present a 40 ns cz gate based on a bipolar flux pulse suppressing leakage (0.1%) by interference and approaching the speed limit set by exchange coupling. This pulse harnesses a built-in echo to enhance fidelity (99.1%) and is robust to long-timescale distortion in the flux-control line, ensuring repeatability. Numerical simulations matching experiment show that fidelity is limited by high-frequency dephasing and leakage by short-timescale distortion.
In the companion paper (Part I), we developed an optimal-control framework to suppress intrinsic and decoherence-induced errors in controlled-Z (CZ) gates between directly coupled, frequency-tunable transmons. Here, we extend this framework to incorporate uncertainties in coupling strength, anharmonicities, and zero-flux qubit frequencies, enabling the design of high-fidelity gates robust against noise and parameter uncertainties. We classify these uncertainties by whether they perturb the off-diagonal coupling strengths or the diagonal detunings of the Hamiltonian, and we identify distinct suppression mechanisms for each class. Coupling errors are mitigated through dynamical decoupling induced by strong detuning modulation. For a 30-ns gate, this strategy reduces the coupling error to 6.21×10−7 and tolerates coupling-strength uncertainties up to 2π×4 MHz while keeping total gate infidelity below 10−3. Detuning errors are minimized near a symmetric-detuning operating point that balances the two dominant leakage-mediated interactions. A 24-ns gate operated near this point tolerates individual uncertainties of up to 2π×5 MHz in each relevant diagonal parameter under the same infidelity threshold. We further optimize gate performance under realistic conditions where intrinsic errors, decoherence, and parameter uncertainties coexist across six representative stages of progressively improving hardware performance. The resulting stage-specific controls achieve lower infidelity and greater robustness. Together with the companion study (Part I), this framework offers a practical approach to balance speed, fidelity, and robustness while reducing the need for exhaustive characterization and frequent recalibration in large-scale superconducting quantum processors.
High fidelity two-qubit gates exhibiting low cross talk are essential building blocks for gate-based quantum information processing. In superconducting circuits, two-qubit gates are typically based either on rf-controlled interactions or on the in situ tunability of qubit frequencies. Here, we present an alternative approach using a tunable cross-Kerr-type ZZ interaction between two qubits, which we realize with a flux-tunable coupler element. We control the ZZ-coupling rate over 3 orders of magnitude to perform a rapid (38 ns), high-contrast, low leakage (0.14±0.24%) conditional phase CZ gate with a fidelity of 97.9±0.7% as measured in interleaved randomized benchmarking without relying on the resonant interaction with a noncomputational state. Furthermore, by exploiting the direct nature of the ZZ coupling, we easily access the entire conditional phase gate family by adjusting only a single control parameter.
Fluxoniums, as partially-protected superconducting qubits are promising to be employed to build high-performance large-scale quantum processor. The recently proposed ``integer fluxonium" operates at zero external flux bias, with a frequency of approximately 3 GHz. Single-qubit gate fidelity has been demonstrated to exceed 99.9%, while two-qubit gate schemes and scalable architectures remain underexplored. In this work, we investigate a fluxonium-transmon-fluxonium (FTF) coupling architecture using integer fluxoniums. We first confirm suppression of ZZ interaction in the FTF system and then propose two high-fidelity controlled-Z (CZ) gate schemes utilizing the coupler control: a flux-activated adiabatic gate scheme and a microwave-activated non-adiabatic gate scheme. Both schemes are capable of achieving low coherent error on the order of 1×10−6 within gate durations of several tens of nanoseconds. Additionally, we discuss a hybrid circuit system in which an integer fluxonium is coupled to a conventional fluxonium through a transmon coupler. Our proposal provides insights for future implementations of large-scale quantum circuits based on integer fluxonium devices.