A major challenge in developing quantum computing technologies is to accomplish high precision tasks by utilizing multiplex optimization approaches, on both the physical system and algorithm levels. Loss functions assessing the overall performance of quantum circuits can provide the foundation for many optimization techniques. In this Letter, we use the quadratic error loss and the final-state fidelity loss to characterize quantum circuits. We find that the distribution of computation error is approximately Gaussian, which in turn justifies the quadratic error loss. It is shown that these loss functions can be efficiently evaluated in a scalable way by sampling from Clifford-dominated circuits. We demonstrate the results by numerically simulating 10-qubit noisy quantum circuits with various error models as well as executing 4-qubit circuits with up to ten layers of 2-qubit gates on a superconducting quantum processor. Our results pave the way toward the optimization-based quantum device and algorithm design in the intermediate-scale quantum regime.
A major challenge in developing quantum computing technologies is to accomplish high precision tasks by utilizing multiplex optimization approaches, on both the physical system and algorithm levels. Loss functions assessing the overall performance of quantum circuits can provide the foundation for many optimization techniques. In this Letter, we use the quadratic error loss and the final-state fidelity loss to characterize quantum circuits. We find that the distribution of computation error is approximately Gaussian, which in turn justifies the quadratic error loss. It is shown that these loss functions can be efficiently evaluated in a scalable way by sampling from Clifford-dominated circuits. We demonstrate the results by numerically simulating 10-qubit noisy quantum circuits with various error models as well as executing 4-qubit circuits with up to ten layers of 2-qubit gates on a superconducting quantum processor. Our results pave the way toward the optimization-based quantum device and algorithm design in the intermediate-scale quantum regime.
Characterizing the performance of noisy quantum circuits is central to the production of prototype quantum computers and can enable improved quantum error correction that exploits noise biases identified in a quantum device. We develop a scalable noise-characterization protocol suited to characterizing the syndrome-extraction circuits of quantum error-correcting codes, a key component of fault-tolerant architectures. Our protocol builds upon averaged circuit eigenvalue sampling (ACES), a framework for noise-characterization experiments that simultaneously estimates the Pauli-error probabilities of all gates in a Clifford circuit and captures averaged spatial correlations between gates implemented simultaneously in the layers of the circuit. By rigorously analyzing the performance of noise-characterization experiments in the ACES framework, we derive a figure of merit for their expected performance, allowing us to optimize their experimental design and improve the precision to which we estimate noise given fixed experimental resources. We demonstrate the scalability and performance of our protocol through circuit-level numerical simulations of the entire noise-characterization procedure for the syndrome-extraction circuit of a distance- 25 surface code with over 1000 qubits. Our results indicate that detailed noise-characterization methods are scalable to near-term quantum devices.
The increasing scale of near-term quantum hardware motivates the need for efficient noise characterization methods, since qubit and gate level techniques cannot capture crosstalk and correlated noise in many qubit systems. While scalable approaches, such as cycle benchmarking, are known for special classes of quantum circuits, the characterization of noise in general circuits with non-Clifford gates has been an unreachable task. We develop an algorithm that can sample-efficiently estimate the total amount of noise induced by a layer of arbitrary non-Clifford gates, including all crosstalks, and experimentally demonstrate the method on IBM Quantum hardware. Our algorithm is inspired by Google's quantum supremacy experiment and is based on random circuit sampling. In their paper, Google observed that their experimental linear cross entropy was consistent with a simple uncorrelated noise model, and claimed this coincidence indicated that the noise in their device was uncorrelated -- a key step in hardware development towards fault tolerance. As an application, we show that our result provides formal evidence to support such a conclusion.
Abstract Fidelity is one of the most valuable and commonly used metrics for assessing the performance of quantum circuits on error-prone quantum processors. Several approaches have been proposed to estimate circuit fidelity without executing it on quantum hardware, but they often face limitations in scalability or accuracy. In this work, we present a comprehensive theoretical framework to predict the fidelity of quantum circuits under depolarizing noise. Building on theoretical results, we propose an efficient fidelity estimation algorithm based on device calibration data. The method is thoroughly validated through simulation and execution on real hardware, demonstrating improved accuracy compared to state-of-the-art alternatives, with enhancements in prediction R 2 ranging from 4.96% to 213.54%. The proposed approach provides a scalable and practical tool for benchmarking quantum hardware, comparing quantum software techniques such as compilation methods, obtaining computation bounds for quantum systems, and guiding hardware design decisions, making it a critical resource for developing and evaluating quantum computing technologies.
We present two classical algorithms for the simulation of universal quantum circuits on n qubits constructed from c instances of Clifford gates and t arbitrary-angle Z-rotation gates such as T gates.Our algorithms complement each other by performing best in different parameter regimes.The ESTIMATE algorithm produces an additive precision estimate of the Born-rule probability of a chosen measurement outcome with the only source of run-time inefficiency being a linear dependence on the stabilizer extent (with scaling approximately equal to 1.17 t for T gates).Our algorithm is state of the art for this task: as an example, in approximately 13 h (on a standard desktop computer), we estimate the Born-rule probability to within an additive error of 0.03, for a 50-qubit, 60 non-Clifford gate quantum circuit with more than 2000 Clifford gates.Our second algorithm, COMPUTE, calculates the probability of a chosen measurement outcome to machine precision with run time O 2 t-r t , where r is an efficiently computable, circuit-specific quantity.With high probability, r is very close to min {t, n -w} for random circuits with many Clifford gates, where w is the number of measured qubits.COMPUTE can be effective in surprisingly challenging parameter regimes, e.g., we can randomly sample Clifford+T circuits with n = 55, w = 5, c = 10 5 , and t = 80 T gates, and then compute the Born-rule probability with a run time consistently less than 10 min using a single core of a standard desktop computer.We provide a C+Python implementation of our algorithms and benchmark them using random circuits, the hidden-shift algorithm, and the quantum approximate optimization algorithm.
Generating samples from the output distribution of a quantum circuit is a ubiquitous task used as a building block of many quantum algorithms. Here we show how to accomplish this task on a noisy quantum processor lacking full-blown error correction for a special class of quantum circuits dominated by Clifford gates. Our approach is based on Coherent Pauli Checks (CPCs) that detect errors in a Clifford circuit by verifying commutation rules between random Pauli-type check operators and the considered circuit. Our main contributions are as follows. First, we derive a simple formula for the probability that a Clifford circuit protected by CPCs contains a logical error. In the limit of a large number of checks, the logical error probability is shown to approach the value ≈7εn/5, where n is the number of qubits and ε is the depolarizing error rate. Our formula agrees nearly perfectly with the numerical simulation results. Second, we show that CPCs are well-suited for quantum processors with a limited qubit connectivity. For example, the difference between all-to-all and linear qubit connectivity is only a 3X increase in the number of CNOT gates required to implement CPCs. Third, we describe simplified one-sided CPCs which are well-suited for mitigating measurement errors in the single-shot settings. Finally, we report an experimental demonstration of CPCs with up to 10 logical qubits and more than 100 logical CNOT gates. Our experimental results show that CPCs provide a marked improvement in the logical error probability for the considered task of sampling the output distribution of quantum circuits.
Generating samples from the output distribution of a quantum circuit is a ubiquitous task used as a building block of many quantum algorithms. Here we show how to accomplish this task on a noisy quantum processor lacking full-blown error correction for a special class of quantum circuits dominated by Clifford gates. Our approach is based on coherent Pauli checks (CPCs) that detect errors in a Clifford circuit by verifying commutation rules between random Pauli-type check operators and the considered circuit. Our main contributions are as follows. First, we derive a simple formula for the probability that a Clifford circuit protected by CPCs contains a logical error. In the limit of a large number of checks, the logical error probability is shown to approach the value $\ensuremath{\approx}7\ensuremath{\epsilon}n/5$, where n is the number of qubits and $\ensuremath{\epsilon}$ is the depolarizing error rate. Our formula agrees nearly perfectly with the numerical simulation results. Second, we show that CPCs are well suited for quantum processors with a limited qubit connectivity. For example, the difference between all-to-all and linear qubit connectivity is only a $3\ifmmode\times\else\texttimes\fi{}$ increase in the number of cnot gates required to implement CPCs. Third, we describe simplified one-sided CPCs, which are well suited for mitigating measurement errors in the single-shot settings. Finally, we report an experimental demonstration of CPCs with up to 10 logical qubits and more than 100 logical cnot gates. Our experimental results show that CPCs provide a marked improvement in the logical error probability for the considered task of sampling the output distribution of quantum circuits.