An important challenge in superconducting quantum computing is the need to physically couple many devices using quasi-two-dimensional fabrication processes. Recent advances in the design and fabrication of quantum annealing processors have enabled an increase in pairwise connectivity among thousands of qubits. One benefit of this is the ability to minor-embed optimization problems using fewer physical qubits for each logical spin. Here we demonstrate the benefit of this progress in the problem of minimizing the energy of three-dimensional spin glasses. Comparing the previous generation D-Wave 2000Q system to the new Advantage system, we observe improved scaling of solution time and improved consistency over multiple graph embeddings.
The D-Wave quantum annealers make it possible to obtain high quality solutions of NP-hard problems by mapping a problem in a QUBO (quadratic unconstrained binary optimization) or Ising form to the physical qubit connectivity structure on the D-Wave chip. However, the latter is restricted in that only a fraction of all pairwise couplers between physical qubits exists. Modeling the connectivity structure of a given problem instance thus necessitates the computation of a minor embedding of the variables in the problem specification onto the logical qubits, which consist of several physical qubits "chained" together to act as a logical one. After annealing, it is however not guaranteed that all chained qubits get the same value (-1 or +1 for an Ising model, and 0 or 1 for a QUBO), and several approaches exist to assign a final value to each logical qubit (a process called "unembedding"). In this work, we present tailored unembedding techniques for four important NP-hard problems: the Maximum Clique, Maximum Cut, Minimum Vertex Cover, and Graph Partitioning problems. Our techniques are simple and yet make use of structural properties of the problem being solved. Using Erdös-Rényi random graphs as inputs, we compare our unembedding techniques to three popular ones (majority vote, random weighting, and minimize energy). We demonstrate that our proposed algorithms outperform the currently available ones in that they yield solutions of better quality, while being computationally equally efficient.
Quantum Annealing (QA) offers a promising framework for solving NP-hard optimization problems, but its effectiveness is constrained by the topology of the underlying quantum hardware. Solving an optimization problem
P via QA involves a hardware-aware circuit compilation which requires representing
P as a graph
GP and embedding it into the hardware connectivity graph
GQ that defines how qubits connect to each other in a QA-based quantum processing unit (QPU).
Minor Embedding (ME) is a possible operational form of this hardware-aware compilation. ME heuristically builds a map that associates each node of
GP -- the logical variables of
P -- to a chain of adjacent nodes in
GQ by means of one of its minors, so that the arcs of
GP are preserved as physical connections among qubits in
GQ.
The static topology of hardwired qubits can clearly lead to inefficient compilations because
GQ cannot be a clique, currently. We propose a methodology and a set of criteria to evaluate how the hardware topology
GQ can negatively affect the embedded problem, thus making the quantum optimization more sensible to noise.
We evaluate the result of ME across two QPU topologies: Zephyr graphs (used in current D-Wave systems) and Havel-Hakimi graphs, which allow controlled variation of the average node degree. This enables us to study how the ratio `number of nodes/number of incident arcs per node' affects ME success rates to map
GP into a minor of
GQ.
Our findings, obtained through ME executed on classical, i.e. non-quantum, architectures, suggest that Havel-Hakimi-based topologies, on average, require shorter qubit chains in the minor of
GP, exhibiting smoother scaling of the largest embeddable
GP as the QPU size increases. These characteristics indicate their potential as alternative designs for QA-based QPUs.
Quantum annealing provides a promising route for the development of quantum optimization devices, but the usefulness of such devices will be limited in part by the range of implementable problems as dictated by hardware constraints. To overcome constraints imposed by restricted connectivity between qubits, a larger set of interactions can be approximated using minor embedding techniques whereby several physical qubits are used to represent a single logical qubit. However, minor embedding introduces new types of errors due to its approximate nature. We introduce and study quantum annealing correction schemes designed to improve the performance of quantum annealers in conjunction with minor embedding, thus leading to a hybrid scheme defined over an encoded graph. We argue that this scheme can be efficiently decoded using an energy minimization technique provided the density of errors does not exceed the per-site percolation threshold of the encoded graph. We test the hybrid scheme using a D-Wave Two processor on problems for which the encoded graph is a two-level grid and the Ising model is known to be NP-hard. The problems we consider are frustrated Ising model problem instances with ``planted'' (a priori known) solutions. Applied in conjunction with optimized energy penalties and decoding techniques, we find that this approach enables the quantum annealer to solve minor embedded instances with significantly higher success probability than it would without error correction. Our work demonstrates that quantum annealing correction can and should be used to improve the robustness of quantum annealing not only for natively embeddable problems but also when minor embedding is used to extend the connectivity of physical devices.
Abstract We present a general error-correcting scheme for quantum annealing that allows for the encoding of a logical qubit into an arbitrarily large number of physical qubits. Given any Ising model optimization problem, the encoding replaces each logical qubit by a complete graph of degree C, representing the distance of the error-correcting code. A subsequent minor-embedding step then implements the encoding on the underlying hardware graph of the quantum annealer. We demonstrate experimentally that the performance of a D-Wave Two quantum annealing device improves as C grows. We show that the performance improvement can be interpreted as arising from an effective increase in the energy scale of the problem Hamiltonian or, equivalently, an effective reduction in the temperature at which the device operates. The number C thus allows us to control the amount of protection against thermal and control errors, and, in particular, to trade qubits for a lower effective temperature that scales as C−η, with η⩽2. This effective temperature reduction is an important step towards scalable quantum annealing.
Quantum annealing is a quantum algorithm to solve combinatorial optimization problems. In the current quantum annealing devices, the dynamic range of the input Ising Hamiltonian, defined as the ratio of the largest to the smallest coefficient, significantly affects the quality of the output solution due to limited hardware precision. Several methods have been proposed to reduce the dynamic range by reducing large coefficients in the Ising Hamiltonian. However, existing studies do not take into account minor-embedding, which is an essential process in current quantum annealers. In this study, we revisit three existing coefficient-reduction methods under the constraints of minor-embedding. We evaluate to what extent these methods reduce the dynamic range of the minor-embedded Hamiltonian and improve the sample quality obtained from the D-Wave Advantage quantum annealer. The results show that, on the set of problems tested in this study, the interaction-extension method effectively improves the sample quality by reducing the dynamic range, while the bounded-coefficient integer encoding and the augmented Lagrangian method have only limited effects. Furthermore, we empirically show that reducing external field coefficients at the logical Hamiltonian level is not required in practice, since minor-embedding automatically has the role of reducing them. These findings suggest future directions for enhancing the sample quality of quantum annealers by suppressing hardware errors through preprocessing of the input problem.