Benchmarking Coherent Errors in Controlled-Phase Gates due to Spectator Qubits
Sebastian Krinner, Stefania Lazar, Ants Remm, Christian Kraglund Andersen, Nathan Lacroix, Graham J. Norris, Christoph Hellings, Mihai S. Gabureac, Christopher Eichler, Andreas J. Wallraff
A major challenge in operating multiqubit quantum processors is to mitigate multiqubit coherent errors. For superconducting circuits, besides crosstalk originating from imperfect isolation of control lines, dispersive coupling between qubits is a major source of multiqubit coherent errors. We benchmark phase errors in a controlled-phase gate due to dispersive coupling of either of the qubits involved in the gate to one or more spectator qubits. We measure the associated gate infidelity using quantum-process tomography. We point out that, due to coupling of the gate qubits to a noncomputational state during the gate, two-qubit conditional-phase errors are enhanced. Our work is important for understanding limits to the fidelity of two-qubit gates with finite on-off ratio in multiqubit settings.
A major challenge in operating multiqubit quantum processors is to mitigate multiqubit coherent errors. For superconducting circuits, besides crosstalk originating from imperfect isolation of control lines, dispersive coupling between qubits is a major source of multiqubit coherent errors. We benchmark phase errors in a controlled-phase gate due to dispersive coupling of either of the qubits involved in the gate to one or more spectator qubits. We measure the associated gate infidelity using quantum-process tomography. We point out that, due to coupling of the gate qubits to a noncomputational state during the gate, two-qubit conditional-phase errors are enhanced. Our work is important for understanding limits to the fidelity of two-qubit gates with finite on-off ratio in multiqubit settings.
Maintaining or even improving gate performance with growing numbers of parallel controlled qubits is a vital requirement for fault-tolerant quantum computing.For superconducting quantum processors, though isolated one-or two-qubit gates have been demonstrated with high fidelity, implementing these gates in parallel commonly shows worse performance.Generally, this degradation is attributed to various crosstalks between qubits, such as quantum crosstalk due to residual inter-qubit coupling.An understanding of the exact nature of these crosstalks is critical to figuring out respective mitigation schemes and improved qubit architecture designs with low crosstalk.Here we give a theoretical analysis of quantum crosstalk impact on simultaneous gate operations in a qubit architecture, where fixed-frequency transmon qubits are coupled via a tunable bus, and sub-100-ns controlled-Z (CZ) gates can be realized by applying a baseband flux pulse on the bus.Our analysis shows that for microwave-driven single-qubit gates, the dressing from the qubit-qubit coupling can cause non-negligible cross-driving errors when qubits operate near frequency collision regions.During CZ gate operations, although unwanted nearest-neighbor interactions are nominally turned off, sub-MHz parasitic next-nearest-neighbor interactions involving spectator qubits can still exist, causing considerable leakage or control error when one operates qubit systems around these parasitic resonance points.To ensure high-fidelity simultaneous operations, a request could be raised to figure out a better way to balance the gate error from target qubit systems themselves and the error from nonparticipating spectator qubits.Overall, our analysis suggests that towards useful quantum processors, the qubit architecture should be examined carefully in the context of high-fidelity simultaneous gate operations in a scalable qubit lattice.
Crosstalk and several forms of coherent noise are invisible when a qubit or a gate is calibrated or benchmarked in isolation. These are unlocked during the execution of a full quantum circuit applying entangling gates to several qubits simultaneously. Unitary crosstalk noise, such as an unwanted Z-Z coupling, limits the state fidelity during the execution of cross-resonance controlled-not (cnot) gates in superconductor quantum computers. This work presents (1) a method of tracing coherent errors by exploiting their sensitivity to the arrangement of cnot gates in the circuit and (2) a correction scheme that modifies the original circuit by inserting carefully the chosen compensating gates (single- or two-qubit) to possibly undo coherent errors. On two vastly different types of IBMQ processors offering quantum volume 8 to 32, our experimental results show up to 25% reduction in the infidelity of [[7,1,3]] code $|+\ensuremath{\rangle}$ state (Clifford circuits) and five- to 15-qubit W states (non-Clifford circuits). Our experimental circuits aggressively deploy forced commutation of cnot gates to obtain low-noise state-preparation circuits. An encoded state initialized with fewer errors marks an important step towards successful demonstration of fault-tolerant quantum computers.
Achieving high-fidelity single-qubit gates, two-qubit gates, and qubit readout is critical for building scalable, error-corrected quantum computers. However, device parameters that enhance one operation often degrade the others, making simultaneous optimization challenging. Here, we demonstrate that careful tuning of qubit-coupler coupling strengths in a superconducting circuit with two transmon qubits coupled via a tunable coupler enables high-fidelity single- and two-qubit gates, without compromising readout performance. Furthermore, we introduce a new calibration protocol for diabatic controlled- Z gates, phased-averaged leakage error amplification (PALEA), which enables efficient suppression of coherent gate errors and leakage to noncomputational states. Using PALEA in combination with careful tuning of qubit-coupler coupling strengths, we achieve a 40 h-averaged CZ gate fidelity of 99.93 %, simultaneous single-qubit gate fidelities of 99.98 %, and readout fidelities over 99.94 % in a single device. Our results demonstrate a viable path toward scaling up superconducting quantum processors while maintaining consistently high gate and readout fidelities.
As quantum circuits become more integrated and complex, additional error sources that were previously insignificant start to emerge. Consequently, the fidelity of quantum gates benchmarked under pristine conditions falls short of predicting their performance in realistic circuits. To overcome this problem, we must improve their robustness against pertinent error models besides isolated fidelity. Here, we report the experimental realization of robust quantum gates in superconducting quantum circuits based on a geometric framework for diagnosing and correcting various gate errors. Using quantum process tomography and randomized benchmarking, we demonstrate robust single-qubit gates against quasistatic noise and spatially correlated noise in a broad range of strengths, which are common sources of coherent errors in large-scale quantum circuits. We also apply our method to nonstatic noises and to realize robust two-qubit gates. Our Letter provides a versatile toolbox for achieving noise-resilient complex quantum circuits.
Scalable quantum information processing requires the ability to tune multiqubit interactions. This makes the precise manipulation of quantum states particularly difficult for multiqubit interactions because tunability unavoidably introduces sensitivity to fluctuations in the tuning parameters, leading to erroneous multiqubit gate operations. The performance of quantum algorithms may be severely compromised by coherent multiqubit errors. It is therefore imperative to understand how these fluctuations affect multiqubit interactions and, more importantly, to mitigate their influence. In this study, we demonstrate how to implement dynamical-decoupling techniques to suppress the two-qubit analogue of the dephasing on a superconducting quantum device featuring a compact tunable coupler, a trending technology that enables the fast manipulation of qubit-qubit interactions. The pure-dephasing time shows up to an approximate 14 times enhancement on average when using robust sequences. The results are in good agreement with the noise generated from room-temperature circuits. Our study further reveals the decohering processes associated with tunable couplers and establishes a framework to develop gates and sequences robust against two-qubit errors.
Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.