We explore a method for automatically recompiling a quantum circuit A into a target circuit B , with the goal that both circuits have the same action on a specific input i.e. B ∣ i n ⟩ = A ∣ i n ⟩ . This is of particular relevance to hybrid, NISQ-era algorithms for dynamical simulation or eigensolving. The user initially specifies B as a blank template: a layout of parameterised unitary gates configured to the identity. The compilation then proceeds using quantum hardware to perform an isomorphic energy-minimisation task, and an optional gate elimination phase to compress the circuit. If B is insufficient for perfect recompilation then the method will result in an approximate solution. We optimise using imaginary time evolution, and a recent extension of quantum natural gradient for noisy settings. We successfully recompile a 7 -qubit circuit involving 186 gates of multiple types into an alternative form with a different topology, far fewer two-qubit gates, and a smaller family of gate types. Moreover we verify that the process is r o b u s t , finding that per-gate noise of up to 1 % can still yield near-perfect recompilation. We test the scaling of our algorithm on up to 20 qubits, recompiling into circuits with up to 400 parameterized gates, and incorporate a custom adaptive timestep technique. We note that a classical simulation of the process can be useful to optimise circuits for today's prototypes, and more generally the method may enable `blind' compilation i.e. harnessing a device whose response to control parameters is deterministic but unknown.The code and resources used to generate our results are openly available online \cite{githubLink} \cite{mmaGithubLink}. A simple Mathematica demonstration of our algorithm can be found at questlink.qtechtheory.org.
We explore a method for automatically recompiling a quantum circuit A into a target circuit B , with the goal that both circuits have the same action on a specific input i.e. B ∣ i n ⟩ = A ∣ i n ⟩ . This is of particular relevance to hybrid, NISQ-era algorithms for dynamical simulation or eigensolving. The user initially specifies B as a blank template: a layout of parameterised unitary gates configured to the identity. The compilation then proceeds using quantum hardware to perform an isomorphic energy-minimisation task, and an optional gate elimination phase to compress the circuit. If B is insufficient for perfect recompilation then the method will result in an approximate solution. We optimise using imaginary time evolution, and a recent extension of quantum natural gradient for noisy settings. We successfully recompile a 7 -qubit circuit involving 186 gates of multiple types into an alternative form with a different topology, far fewer two-qubit gates, and a smaller family of gate types. Moreover we verify that the process is r o b u s t , finding that per-gate noise of up to 1 % can still yield near-perfect recompilation. We test the scaling of our algorithm on up to 20 qubits, recompiling into circuits with up to 400 parameterized gates, and incorporate a custom adaptive timestep technique. We note that a classical simulation of the process can be useful to optimise circuits for today's prototypes, and more generally the method may enable `blind' compilation i.e. harnessing a device whose response to control parameters is deterministic but unknown.The code and resources used to generate our results are openly available online \cite{githubLink} \cite{mmaGithubLink}. A simple Mathematica demonstration of our algorithm can be found at questlink.qtechtheory.org.
We describe a method for automatically recompiling a quantum circuit A into a target circuit B, with the goal that both circuits have the same action on a specific input i.e. A|in> = B|in>. This is of particular relevance to hybrid, NISQ-era algorithms for dynamical simulation or eigensolving. The user initially specifies B as a blank template: a layout of parameterised unitary gates configured to the identity. The compilation then proceeds using quantum hardware to perform an isomorphic energy-minimisation task, and optionally a gate elimination phase to compress the circuit. We use a recently introduced imaginary-time technique derived from McLachlan's variational principle. If the template for B is too shallow for perfect recompilation then the method will result in an approximate solution. As a demonstration we successfully recompile a 7-qubit circuit involving 186 gates of multiple types into an alternative form with a different topology, a far lower two-qubit gate count, and a smaller family of gate types. We test the scaling of our algorithm on up to 20 qubits, recompiling into circuits with up to 400 parameterized gates, and incorporate a novel adaptive timestep technique. We note that a classical simulation of the process can be useful to optimise circuits for today's prototypes, and more generally the method may enable `blind' compilation i.e. harnessing a device whose response to control parameters is deterministic but unknown.
Abstract Gate-level quantum circuits are often derived manually from higher level algorithms. While this suffices for small implementations and demonstrations, ultimately automatic circuit design will be required to realise complex algorithms using hardware-specific operations and connectivity. Therefore, ab initio creation of circuits within a machine, either a classical computer or a hybrid quantum–classical device, is of key importance. We explore a range of established and novel techniques for the synthesis of new circuit structures, the optimisation of parameterised circuits, and the efficient removal of low-value gates via the quantum geometric tensor. Using these techniques we tackle the tasks of automatic encoding of unitary processes and translation (recompilation) of a circuit from one form to another. Using emulated quantum computers with various noise-free gate sets we provide simple examples involving up to 10 qubits, corresponding to 20 qubits in the augmented space we use. Further applications of specific relevance to chemistry modelling are considered in a sister paper, ‘Exploiting subspace constraints and ab initio variational methods for quantum chemistry’. The emulation environments used were QuEST, QuESTlink and pyQuEST. All resources will be made openly accessible and are currently available upon request.
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale. In this paper, we propose a hierarchical, block-by-block optimization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noise simulations, and large-size circuits on analytical models. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compilers such as t|ket>. When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits. Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation toolchain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains.
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale. In this paper, we propose a hierarchical, block-by-block opti-mization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noisy simulations, and large-size circuits on analytical models. Our technique can be applied after existing optimizations to achieve higher circuit fidelity. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compiler optimizations such as t|ket). When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits, Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation tool chain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains to further improve the circuit fidelity.
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale.
In this paper, we propose a hierarchical, block-by-block optimization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noise simulations, and large-size circuits on analytical models. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compilers such as t|ket>. When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits. Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation toolchain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains.
Abstract Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting for compilation error and circuit noise, we demonstrate that time evolution and quantum Fourier transformation circuits achieve high compression rates, while random quantum circuits are less compressible. The degree of compression is related to the rate of entanglement accumulation in the target circuit. In particular, experiments on IBM platforms achieve a compression rate of 12.5 for N=12, significantly extending the application of current quantum devices. Furthermore, large-scale numerical simulations for system sizes up to N=30 reveal that the optimal depth dmax to achieve maximal overall fidelity is independent of system size N, suggesting the scalability of our method for large quantum devices in terms of quantum resources.