Flag qubits have recently been proposed in syndrome extraction circuits to detect high-weight errors arising from fewer faults. The use of flag qubits allows the construction of fault-tolerant protocols with the fewest number of ancillas known to date. In this work, we prove some critical properties of Calderbank-Shor-Steane (CSS) codes constructed from classical cyclic codes that enable the construction of a flag fault-tolerant error correction scheme. We then develop fault-tolerant protocols as well as a family of circuits for flag fault-tolerant error correction and operator measurement, requiring only four ancilla qubits and applicable to cyclic CSS codes of distance 3. The measurement protocol can be further used for logical Clifford gate implementation via quantum gate teleportation. We also provide examples of cyclic CSS codes with large encoding rates.
Flag qubits have recently been proposed in syndrome extraction circuits to detect high-weight errors arising from fewer faults. The use of flag qubits allows the construction of fault-tolerant protocols with the fewest number of ancillas known to date. In this work, we prove some critical properties of Calderbank-Shor-Steane (CSS) codes constructed from classical cyclic codes that enable the construction of a flag fault-tolerant error correction scheme. We then develop fault-tolerant protocols as well as a family of circuits for flag fault-tolerant error correction and operator measurement, requiring only four ancilla qubits and applicable to cyclic CSS codes of distance 3. The measurement protocol can be further used for logical Clifford gate implementation via quantum gate teleportation. We also provide examples of cyclic CSS codes with large encoding rates.
Fault-tolerant quantum error correction (FTEC) protocol is one of the most important components for a fault-tolerant simulation of a quantum circuit. It helps prevent error accumulation during the process which may cause the computation to fail. In a physical implementation of fault-tolerant circuits, the number of required ancilla qubits for the FTEC protocol can be a major concern because it grows exponentially as the level of concatenation increases whereas the resources are limited. Recently, the idea of using flag qubits to detect high-weight errors caused by fewer faults in syndrome extraction circuits has been proposed. The use of flag qubits allows the construction of fault-tolerant protocols with the fewest number of ancillas known to-date. In this work, some critical properties of CSS codes constructed from classical cyclic codes that enable the construction of a flag fault-tolerant error correction scheme are proved, and a fault-tolerant protocol along with a family of circuits for flag fault-tolerant error correction are given. The flag-FTEC protocol proposed in this work requires only four ancilla qubits and applicable to CSS codes of distance 3 constructed from classical cyclic codes.
Quantum error correction (QEC) is an effective way to overcome quantum noise and de-coherence, meanwhile the fault tolerance of the encoding circuit, syndrome measurement circuit, and logical gate realization circuit must be ensured so as to achieve reliable quantum computing. Steane code is one of the most famous codes, proposed in 1996, however, the classical encoding circuit based on stabilizer implementation is not fault-tolerant. In this paper, we propose a method to design a fault-tolerant encoding circuit for Calderbank-Shor-Steane (CSS) code based on stabilizer implementation and “flag” bits. We use the Steane code as an example to depict in detail the fault-tolerant encoding circuit design process including the logical operation implementation, the stabilizer implementation, and the “flag” qubits design. The simulation results show that assuming only one quantum gate will be wrong with a certain probability p, the classical encoding circuit will have logic errors proportional to p; our proposed circuit is fault-tolerant as with the help of the “flag” bits, all types of errors in the encoding process can be accurately and uniquely determined, the errors can be fixed. If all the gates will be wrong with a certain probability p, which is the actual situation, the proposed encoding circuit will also be wrong with a certain probability, but its error rate has been reduced greatly from p to p2 compared with the original circuit. This encoding circuit design process can be extended to other CSS codes to improve the correctness of the encoding circuit.
To perform achieve fault-tolerant quantum computation, one can use flagged syndrome extraction with fewer ancilla qubits. However, it suffers from long circuit depth if one stabilizer is measured at a time. Previously, Reichardt showed that it is possible to measure multiple stabilizers with at most one shared flag qubit for certain small quantum codes. In this paper, we propose a procedure for general Calderbank-Shor-Steane codes of distance three so that multiple Z stabilizers (X stabilizers) can be fault tolerantly measured in parallel with one shared flag qubit. We simulate the memory and computation pseudothresholds for various code schemes. In particular, our parallel scheme based on Shor's nine-qubit code performs better than known seven- and nine-qubit schemes in the literature.
Fault-tolerant state preparation is essential for reliable quantum error correction, particularly in Steane-type error correction, which relies on robust ancilla states for syndrome readout. One method of fault-tolerant state preparation is to initialize multiple ancilla states and check them against each other to detect problematic errors. In the worst case, the number of states required for successful initialization grows polynomially with the code distance, but it has been shown that this can be reduced to constant ancilla overhead-in the best case, only four states are required. However, existing techniques for finding low-overhead initialization schemes are limited to codes with large symmetry groups, such as the Golay code. In this work, we propose a general, automated synthesis methodology for Steane-type fault-tolerant state preparation circuits that applies to arbitrary Calderbank-Shor-Steane (CSS) codes and does not rely on code symmetries. We apply the proposed methods to various CSS codes up to a distance of seven and simulate the successful fault-tolerant initialization of logical basis states under circuit-level depolarizing noise. The circuits synthesized using the proposed methodology provide an important step towards experimental realizations of high-fidelity ancilla states for near-term demonstration of fault-tolerant quantum computation.
Abstract Fault-tolerant quantum computation (FTQC) schemes using large block codes that encode k > 1 qubits in n physical qubits can potentially reduce the resource overhead to a great extent because of their high encoding rate. However, the fault-tolerant (FT) logical operations for the encoded qubits are difficult to find and implement, which usually takes not only a very large resource overhead but also long in situ computation time. In this paper, we focus on Calderbank–Shor–Steane [[ n , k , d ]] (CSS) codes and their logical FT Clifford circuits. We show that the depth of an arbitrary logical Clifford circuit can be implemented fault-tolerantly in O (1) steps in situ via either Knill or Steane syndrome measurement circuit, with the qualified ancilla states efficiently prepared. Particularly, for those codes satisfying k / n ∼ Θ(1), the resource scaling for Clifford circuits implementation on the logical level can be the same as on the physical level up to a constant, which is independent of code distance d . With a suitable pipeline to produce ancilla states, our scheme requires only a modest resource cost in physical qubits, physical gates, and computation time for very large scale FTQC.
Recently, the circular connectivity pattern has been presented for a class of stabilizer quantum error correction codes. The circular connectivity pattern for such a class of stabilizer codes can be implemented in a resource-efficient manner using a single ancilla and native two-qubit Controlled-Not-Swap gates (CNS) gates, which may be interesting for demonstrating error-correction codes with superconducting quantum processors. However, one concern is that this scheme is not fault-tolerant. And it might not apply to the Calderbank-Shor-Steane (CSS) codes. In this paper, we present a fault-tolerant version of the circular connectivity pattern, named the double-circular connectivity pattern. This pattern is an implementation for syndrome-measurement circuits with a flagged error correction scheme for stabilizer codes. We illustrate that this pattern is available for Steane code (a CSS code), Laflamme’s five-qubit code, and Shor’s nine-qubit code. For Laflamme’s five-qubit code and Shor’s nine-qubit code, the pattern has the property that it uses only native two-qubit CNS gates, which are more efficient in the superconducting quantum platform.