Within the general context of the architecture in quantum computer design, this paper aims is to provide a general strategy to obtain a block-matrix representation of quantum gates applied to qubits placed in arbitrary positions over an arbitrary dimensional input state. The model is also extended to the framework of quantum computation with qudits. An application in the context of the quantum computational logic is provided.
Within the general context of the architecture in quantum computer design, this paper aims is to provide a general strategy to obtain a block-matrix representation of quantum gates applied to qubits placed in arbitrary positions over an arbitrary dimensional input state. The model is also extended to the framework of quantum computation with qudits. An application in the context of the quantum computational logic is provided.
Quantum computing with qudits, quantum systems with d>2 levels, offers a powerful extension beyond qubits, expanding the computational possibilities of quantum systems, allowing the simplification of the implementation of several algorithms and, possibly, providing a foundation for optimised error correction. In this work, we propose a novel formulation of qudit gates that is universally applicable for any number of levels d, without restrictions on the dimensionality. By extending the mathematical framework of quantum gates to arbitrary dimensions, we derive explicit gate operations that form a universal set for quantum computation on qudits of any size. We demonstrate the validity of our approach through the implementation of the Quantum Fourier Transform (QFT) for arbitrary d, verifying both the correctness and utility of our generalized gates. This novel methodology broadens the design space for quantum algorithms and fault-tolerant architectures, paving the way for advancements in qudit-based quantum computing.
Quantum computers are becoming a reality thanks to the accomplishments made in recent years. The quantum computers available today offer hundreds of qubits but are still limited in the number of operations they can perform before errors accumulate and the quantum state decays. In regard to the error accumulation, non-local operations such as CX or CZ are main contributors. One promising solution to reduce the number of required non-local operations is to make a more efficient use of the quantum hardware by exploiting the inherent high-dimensional capabilities of quantum systems. In a process called circuit compression, non-local operations between qubits are mapped to local operations in qudits, i.e., higher-dimensional systems. In this work, we present a strategy for enabling quantum circuit compression with the aim of mapping clusters of qubits in a given circuit to the mixed-dimensional qudits of the target hardware. Further, we discuss the principles of circuit compression as well as the physical structure of qubits and qudits, before introducing a new representation that captures the essence of quantum operations, affecting the different logical levels in the quantum states in nodes and edges of a graph. Based on this, we propose an automated approach for mapping qubit circuits of arbitrary gate sets to mixed-dimensional quantum systems, lowering the number of non-local operations. Empirical evaluations confirm the effectiveness of the proposed approach reducing the number of non-local operations by up to 50% for almost half of the cases. Finally, the corresponding source code is available freely at github.com/cda-tdum/qudit-compression.
In Section 1.3, we introduced the circuit model of (classical) computation. We restricted attention to reversible circuits since they can simulate any non-reversible circuit with modest overhead. This model can be generalized to a model of quantum circuits. In the quantum circuit model, we have logical qubits carried along ‘wires’, and quantum gates that act on the qubits. A quantum gate acting on n qubits has the input qubits carried to it by n wires, and n other wires carry the output qubits away from the gate. A quantum circuit is often illustrated schematically by a circuit diagram as shown in Figure 4.1. The wires are shown as horizontal lines, and we imagine the qubits propagating along the wires from left to right in time. The gates are shown as rectangular blocks. For convenience, we will restrict attention to unitary quantum gates (which are also reversible). Recall from Section 3.5.3 that non-unitary (non-reversible) quantum operations can be simulated by unitary (reversible) quantum gates if we allow the possibility of adding an ancilla and of discarding some output qubits. A circuit diagram describing a superoperator being implemented using a unitary operator is illustrated in Figure 4.2. In the example of Figure 4.1, the 4-qubit state |ψi⟩= |0⟩⊗ |0⟩⊗ |0⟩⊗ |0⟩ enters the circuit at the left (recall we often write this state as |ψi⟩ = |0⟩|0⟩|0⟩|0⟩ or |ψi⟩ = |0000⟩.) These qubits are processed by the gates U1, U2, U3, and U4. At the output of the circuit we have the collective (possibly entangled) 4-qubit state |ψf⟩. A measurement is then made of the resulting state. The measurement will often be a simple qubit-by-qubit measurement in the computational basis, but in some cases may be a more general measurement of the joint state. A measurement of a single qubit in the computational basis is denoted on a circuit diagram by a small triangle, as shown in Figure 4.1 (there are other symbols used in the literature, but we adopt this one). The triangle symbol will be modified for cases in which there is a need to indicate different types of measurements.R50
Simulating quantum circuits is a computationally intensive task that relies heavily on tensor products and matrix multiplications, which can be inefficient. Recent advancements, eliminate the need for tensor products and matrix multiplications, offering significant improvements in efficiency and parallelization. Extending these optimizations, we adopt a block-simulation methodology applicable to qubit-qudit hybrid systems. This method interprets the statevector as a collection of blocks and applies gates without computing the entire circuit unitary. Our method, a spiritual successor of the simulator QuDiet \cite{Chatterjee_2023}, utilizes this block-simulation method, thereby gaining major improvements over the simulation methods used by its predecessor. We exhibit that the proposed method is approximately 10× to 1000× faster than the state-of-the-art simulator for simulating multi-level quantum systems with various benchmark circuits.
Gate-model quantum computers provide an experimentally implementable architecture for near-term quantum computations. To design a reduced quantum circuit that can simulate a high-complexity reference quantum circuit, an optimization should be taken on the number of input quantum states, on the unitary operations of the quantum circuit, and on the number of output measurement rounds. Besides the optimization of the physical layout of the hardware layer, the quantum computer should also solve difficult computational problems very efficiently. To yield a desired output system, a particular objective function associated with the computational problem fed into the quantum computer should be maximized. The reduced gate structure should be able to produce the maximized value of the objective function. These parallel requirements must be satisfied simultaneously, which makes the optimization difficult. Here, we demonstrate a method for designing quantum circuits for gate-model quantum computers and define the Quantum Triple Annealing Minimization (QTAM) algorithm. The aim of QTAM is to determine an optimal reduced topology for the quantum circuits in the hardware layer at the maximization of the objective function of an arbitrary computational problem.
To achieve large-scale fault-tolerant quantum computation, it may be easier to combine many small sets of qubits than to construct a single large set. For example via quantum error correction with block codes, or distributed quantum processors utilizing shared entanglement. In these regimes, the time or error budget of the overall quantum computation may be dominated by non-local operations. Hence, it is worthwhile to minimize the number of these operations. We consider the case where both non-local and local connectivity may be arbitrarily restricted, and give an asymptotically optimal synthesis method for distributed CNOT and Clifford circuits, based on block-matrix Gaussian elimination. We extend this to all Clifford+RZ circuits by generalizing the Pauli exponential circuit representation; this naturally integrates with existing methods for optimizing T-count. As an application, we show how to implement CNOT circuits in a CSS code encoding n logical qubits in k blocks using O(nk) inter-block transversal CNOTs and intra-block Pauli measurements.