Crosstalk and several forms of coherent noise are invisible when a qubit or a gate is calibrated or benchmarked in isolation. These are unlocked during the execution of a full quantum circuit applying entangling gates to several qubits simultaneously. Unitary crosstalk noise, such as an unwanted Z-Z coupling, limits the state fidelity during the execution of cross-resonance controlled-not (cnot) gates in superconductor quantum computers. This work presents (1) a method of tracing coherent errors by exploiting their sensitivity to the arrangement of cnot gates in the circuit and (2) a correction scheme that modifies the original circuit by inserting carefully the chosen compensating gates (single- or two-qubit) to possibly undo coherent errors. On two vastly different types of IBMQ processors offering quantum volume 8 to 32, our experimental results show up to 25% reduction in the infidelity of $[[7,1,3]]$ code $|+\ensuremath{\rangle}$ state (Clifford circuits) and five- to 15-qubit $W$ states (non-Clifford circuits). Our experimental circuits aggressively deploy forced commutation of cnot gates to obtain low-noise state-preparation circuits. An encoded state initialized with fewer errors marks an important step towards successful demonstration of fault-tolerant quantum computers.Crosstalk and several forms of coherent noise are invisible when a qubit or a gate is calibrated or benchmarked in isolation. These are unlocked during the execution of a full quantum circuit applying entangling gates to several qubits simultaneously. Unitary crosstalk noise, such as an unwanted Z-Z coupling, limits the state fidelity during the execution of cross-resonance controlled-not (cnot) gates in superconductor quantum computers. This work presents (1) a method of tracing coherent errors by exploiting their sensitivity to the arrangement of cnot gates in the circuit and (2) a correction scheme that modifies the original circuit by inserting carefully the chosen compensating gates (single- or two-qubit) to possibly undo coherent errors. On two vastly different types of IBMQ processors offering quantum volume 8 to 32, our experimental results show up to 25% reduction in the infidelity of $[[7,1,3]]$ code $|+\ensuremath{\rangle}$ state (Clifford circuits) and five- to 15-qubit $W$ states (non-Clifford circuits). Our experimental circuits aggressively deploy forced commutation of cnot gates to obtain low-noise state-preparation circuits. An encoded state initialized with fewer errors marks an important step towards successful demonstration of fault-tolerant quantum computers.

arXiv:2109.03533Physical Review AFeb 18, 202222 citations

A new protocol for constructing nonlocal n-qubit controlled-U gates

Chui‐Ping Yang

Physics Letters AOct 2, 200711 citations

Experimental Implementations of Two-Qubit Gates

Christopher J. Ballance

Springer thesesJan 1, 20171 citation

Reversible imprinting and retrieval of quantum information: experimental verification of the Quantum Memory Matrix hypothesis

Florian Neukart, E. J. Marx, V. M. Vinokur

Abstract We report a hardware implementation of a reversible imprint-retrieval cycle motivated by the Quantum Memory Matrix (QMM) framework. Using IBM Quantum backends, we realize five circuits that scale from a minimal three-qubit memory cell to a five-qubit dual-cycle architecture, including variants with controlled phase evolution and deliberate perturbation. Because the circuit readout is based on computational-basis bit strings, the primary experimental metric is the basis-matched retrieval probability, $P_{\textrm{ret}}=N_{\textrm{match}}/N_{\textrm{shots}}$ P ret = N match / N shots , reported together with Wilson-score $95\,\%$ 95 % confidence intervals, Pearson correlations, and mutual information between field and output qubits. Across the five experiments, $P_{\textrm{ret}}$ P ret ranges from $0.487\pm 0.017$ 0.487 ± 0.017 in the evolution stress test to $0.732\pm 0.012$ 0.732 ± 0.012 in the baseline three-qubit cycle, with the dual-cycle and controlled-error variants remaining near 0.70 under realistic device noise. These results provide a proof-of-principle demonstration that finite-dimensional quantum registers can store and return basis-level information through local unitary gates. The experiments therefore support the operational imprint-retrieval primitive underlying QMM, while also identifying full state tomography as the next step toward verifying phase-coherent state recovery.Abstract We report a hardware implementation of a reversible imprint-retrieval cycle motivated by the Quantum Memory Matrix (QMM) framework. Using IBM Quantum backends, we realize five circuits that scale from a minimal three-qubit memory cell to a five-qubit dual-cycle architecture, including variants with controlled phase evolution and deliberate perturbation. Because the circuit readout is based on computational-basis bit strings, the primary experimental metric is the basis-matched retrieval probability, $$P_{\textrm{ret}}=N_{\textrm{match}}/N_{\textrm{shots}}$$ P ret = N match / N shots , reported together with Wilson-score $$95\,\%$$ 95 % confidence intervals, Pearson correlations, and mutual information between field and output qubits. Across the five experiments, $$P_{\textrm{ret}}$$ P ret ranges from $$0.487\pm 0.017$$ 0.487 ± 0.017 in the evolution stress test to $$0.732\pm 0.012$$ 0.732 ± 0.012 in the baseline three-qubit cycle, with the dual-cycle and controlled-error variants remaining near 0.70 under realistic device noise. These results provide a proof-of-principle demonstration that finite-dimensional quantum registers can store and return basis-level information through local unitary gates. The experiments therefore support the operational imprint-retrieval primitive underlying QMM, while also identifying full state tomography as the next step toward verifying phase-coherent state recovery.

arXiv:2502.15766Quantum Information ProcessingJul 21, 20261 citation

Error semitransparent universal control of a bosonic logical qubit

Saswata Roy, Owen C. Wetherbee, Valla Fatemi

Bosonic codes offer hardware-efficient approaches to logical qubit construction and hosted the first demonstration of beyond-break even logical quantum memory. However, such accomplishments were done for idling information, and realization of fault-tolerant logical operations remains a critical bottleneck for universal quantum computation in scaled systems. Error-transparent (ET) gates offer an avenue to resolve this issue, but experimental demonstrations have been limited to phase gates. Here, we introduce a framework based on dynamic encoding subspaces that enables simple linear drives to accomplish universal gates that are error semi-transparent (EsT) to oscillator photon loss. With an EsT logical gate set of {X, H, T}, we observe a five-fold reduction in infidelity conditioned on photon loss, demonstrate extended active-manipulation lifetimes with quantum error correction, and construct a composite EsT non-Clifford operation using a sequence of eight gates from the set. Our approach is compatible with methods for detectable ancilla errors, offering an approach to error-mitigated universal control of bosonic logical qubits with the standard quantum control toolkit.Bosonic codes offer hardware-efficient approaches to logical qubit construction and hosted the first demonstration of beyond-break even logical quantum memory. However, such accomplishments were done for idling information, and realization of fault-tolerant logical operations remains a critical bottleneck for universal quantum computation in scaled systems. Error-transparent (ET) gates offer an avenue to resolve this issue, but experimental demonstrations have been limited to phase gates. Here, we introduce a framework based on dynamic encoding subspaces that enables simple linear drives to accomplish universal gates that are error semi-transparent (EsT) to oscillator photon loss. With an EsT logical gate set of {X, H, T}, we observe a five-fold reduction in infidelity conditioned on photon loss, demonstrate extended active-manipulation lifetimes with quantum error correction, and construct a composite EsT non-Clifford operation using a sequence of eight gates from the set. Our approach is compatible with methods for detectable ancilla errors, offering an approach to error-mitigated universal control of bosonic logical qubits with the standard quantum control toolkit.

quant-pharXiv:2603.15356Nature CommunicationsMar 17, 20260 citations

Direct implementation of an N-qubit controlled-unitary gate in a single step

Preethika Kumar

Quantum Information ProcessingAug 13, 201215 citations

[[7,1,3]]

code $|+\ensuremath{\rangle}$ state (Clifford circuits) and five- to 15-qubit

W

states (non-Clifford circuits). Our experimental circuits aggressively deploy forced commutation of cnot gates to obtain low-noise state-preparation circuits. An encoded state initialized with fewer errors marks an important step towards successful demonstration of fault-tolerant quantum computers.

P_{\textrm{ret}}=N_{\textrm{match}}/N_{\textrm{shots}}

P ret = N match / N shots , reported together with Wilson-score

95\,\%

95 % confidence intervals, Pearson correlations, and mutual information between field and output qubits. Across the five experiments,

P_{\textrm{ret}}

P ret ranges from

0.487\pm 0.017

0.487 ± 0.017 in the evolution stress test to

0.732\pm 0.012

0.732 ± 0.012 in the baseline three-qubit cycle, with the dual-cycle and controlled-error variants remaining near 0.70 under realistic device noise. These results provide a proof-of-principle demonstration that finite-dimensional quantum registers can store and return basis-level information through local unitary gates. The experiments therefore support the operational imprint-retrieval primitive underlying QMM, while also identifying full state tomography as the next step toward verifying phase-coherent state recovery.