arXiv:1706.06570 · Science Advances
Demonstration of universal parametric entangling gates on a multi-qubit lattice
Matthew J. Reagor, C. B. Osborn, Nikolas Tezak, Alexa Staley, G. E. D. K. Prawiroatmodjo, Michael G. Scheer, Nasser Alidoust, Eyob Alebachew Sete, Nicolas Didier, Marcus Palmer Da Silva, Ezer Acala, Joel Angeles, Andrew J. Bestwick, Maxwell Block, Benjamin Bloom, Adam Bradley, Cat-Vu H. Bui, Shane Caldwell, Lauren Capelluto, Rick Chilcott, Jeff Cordova, Genya Crossman, Michael Curtis, Saniya Deshpande, Tristan Ossama El Bouayadi, Daniel Girshovich, Sabrina Hong, Alex Hudson, Peter J. Karalekas, Kat Kuang, Michael Lenihan, Riccardo Manenti, Thomas Manning, Jayss Marshall, Yuvraj Mohan, William B. O’Brien, Johannes Otterbach, Alexander T. Papageorge, Jean-Philip Paquette, Michael Pelstring, Anthony Polloreno, Vijay Rawat, Colm A. Ryan, Russ Renzas, Nick Rubin, Damon Russel, Michael Rust, Diego Scarabelli, Michael Selvanayagam, Rodney Sinclair, Robert Smith, Mark Suska, Ting-Wai To, Mehrnoosh Vahidpour, Nagesh Vodrahalli, Tyler Whyland, Kamal Yadav, William J. Zeng, Chad T. Rigetti
Abstract
We show that parametric coupling techniques can be used to generate selective entangling interactions for multi-qubit processors. By inducing coherent population exchange between adjacent qubits under frequency modulation, we implement a universal gate set for a linear array of four superconducting qubits. An average process fidelity of ℱ = 93% is estimated for three two-qubit gates via quantum process tomography. We establish the suitability of these techniques for computation by preparing a four-qubit maximally entangled state and comparing the estimated state fidelity with the expected performance of the individual entangling gates. In addition, we prepare an eight-qubit register in all possible bitstring permutations and monitor the fidelity of a two-qubit gate across one pair of these qubits. Across all these permutations, an average fidelity of ℱ = 91.6 ± 2.6% is observed. These results thus offer a path to a scalable architecture with high selectivity and low cross-talk.