Abstract The speed at which two remote parties can exchange secret keys in continuous-variable quantum key distribution (CV-QKD) is currently limited by the computational complexity of key reconciliation. Multi-dimensional reconciliation using multi-edge low-density parity-check (LDPC) codes with low code rates and long block lengths has been shown to improve error-correction performance and extend the maximum reconciliation distance. We introduce a quasi-cyclic code construction for multi-edge codes that is highly suitable for hardware-accelerated decoding on a graphics processing unit (GPU). When combined with an 8-dimensional reconciliation scheme, our LDPC decoder achieves an information throughput of 7.16 Kbit/s on a single NVIDIA GeForce GTX 1080 GPU, at a maximum distance of 142 km with a secret key rate of 6.64 × 10−8 bits/pulse for a rate 0.02 code with block length of 106 bits. The LDPC codes presented in this work can be used to extend the previous maximum CV-QKD distance of 100 km to 142 km, while delivering up to 3.50× higher information throughput over the tight upper bound on secret key rate for a lossy channel.
Abstract The speed at which two remote parties can exchange secret keys in continuous-variable quantum key distribution (CV-QKD) is currently limited by the computational complexity of key reconciliation. Multi-dimensional reconciliation using multi-edge low-density parity-check (LDPC) codes with low code rates and long block lengths has been shown to improve error-correction performance and extend the maximum reconciliation distance. We introduce a quasi-cyclic code construction for multi-edge codes that is highly suitable for hardware-accelerated decoding on a graphics processing unit (GPU). When combined with an 8-dimensional reconciliation scheme, our LDPC decoder achieves an information throughput of 7.16 Kbit/s on a single NVIDIA GeForce GTX 1080 GPU, at a maximum distance of 142 km with a secret key rate of 6.64 × 10−8 bits/pulse for a rate 0.02 code with block length of 106 bits. The LDPC codes presented in this work can be used to extend the previous maximum CV-QKD distance of 100 km to 142 km, while delivering up to 3.50× higher information throughput over the tight upper bound on secret key rate for a lossy channel.
Forward error correction enables reliable one-way communication over noisy channels, by transmitting redundant data along with the message in order to detect and resolve errors at the receiver. Low-density parity-check (LDPC) codes achieve superior error-correction performance on Gaussian channels under belief propagation decoding, however, their complex parity-check matrix structure introduces hardware implementation challenges. This thesis explores how the quasi-cyclic structure of LDPC parity-check matrices can be exploited in the design of low-power hardware architectures for multi-Gigabit/second decoders realized in CMOS technology, as well as in the design and construction of multi-edge LDPC codes for long-distance (beyond 100km) quantum cryptography over optical fiber. A frame-interleaved architecture is presented with a path-unrolled message-passing schedule to reduce the complexity of routing interconnect in an integrated circuit decoder implementation. A proof-of-concept silicon test chip was fabricated in the 28nm CMOS technology node. The LDPC decoder chip supports the four codes presented in the IEEE 802.11ad standard, occupies an area of 3.41mm^2, and achieves an energy efficiency of 15pJ/bit while delivering a maximum throughput of 6.78Gb/s, and operating with a 202MHz clock at 0.9V supply. The test chip achieves the highest normalized energy efficiency among published CMOS-based decoders for the IEEE 802.11ad standard. A quasi-cyclic code construction technique is applied to a multi-edge LDPC code with block length of 10^6 bits in order to reduce the latency of LDPC decoding in the key reconciliation step of long-distance quantum key distribution. The GPU-based decoder achieves a maximum information throughput of 7.16Kb/s, and extends the current maximum transmission distance from 100km to 160km with a secret key rate of 4.10 x 10^(-7) bits/pulse under 8-dimensional reconciliation. The GPU-based decoder delivers up to 8.03x higher decoded information throughput over the upper bound on secret key rate for a lossy optical channel, thus demonstrating that key reconciliation with LDPC codes is no longer a post-processing bottleneck in quantum key distribution. The contributions presented in this thesis can be applied to future research in the implementation of silicon-based linear-program decoders for high-reliability channels, and single-chip solutions for quantum key distribution containing integrated photonics and post-processing algorithms.
The decoding throughput during post-processing is one of the major bottlenecks that occur in a continuous-variable quantum key distribution (CV-QKD) system. In this paper, we propose a layered decoder to decode quasi-cyclic multi-edge type LDPC (QC-MET-LDPC) codes using a graphics processing unit (GPU) in continuous-variable quantum key distribution (CV-QKD) systems. As described herein, we optimize the storage methods related to the parity check matrix, merge the sub-matrices which are unrelated, and decode multiple codewords in parallel on the GPU. Simulation results demonstrate that the average decoding speed of LDPC codes with three typical code rates, i.e., 0.1, 0.05 and 0.02, is up to 64.11 Mbits/s, 48.65 Mbits/s and 39.51 Mbits/s, respectively, when decoding 128 codewords of length [Formula: see text] simultaneously without early termination.
Reconciliation is a significant procedure in a continuous-variable quantum key distribution (CV-QKD) system. It is employed to extract secure secret key from the resulted string through quantum channel between two users. However, the efficiency and the speed of previous reconciliation algorithms are low. These problems limit the secure communication distance and the secure key rate of CV-QKD systems. In this paper, we proposed a high-speed reconciliation algorithm through employing a well-structured decoding scheme based on low density parity-check (LDPC) code. The complexity of the proposed algorithm is reduced obviously. By using a graphics processing unit (GPU) device, our method may reach a reconciliation speed of 25 Mb/s for a CV-QKD system, which is currently the highest level and paves the way to high-speed CV-QKD.
The decoding throughput in the postprocessing is one of the bottlenecks for a continuous-variable quantum key distribution (CV-QKD) system. In this paper, we propose a layered decoder to decode quasi-cyclic multi-edge type LDPC (QC-METLDPC) codes based on graphic processing unit (GPU) in continuous-variable quantum key distribution (CV-QKD) systems. We optimize the storage method of the parity check matrix, merge the sub-matrices which are unrelated, and decode multiple codewords in parallel on GPU. Simulation results demonstrate that the average decoding speed of LDPC codes with three typical code rates, i.e., 0.1, 0.05 and 0.02, is up to 64.11Mbits/s, 48.65Mbits/s and 39.51Mbits/s, respectively, when decoding 128 codewords of length 106 simultaneously without early termination.
In continuous-variable (CV) quantum key distribution (QKD), the reconciliation efficiency and frame error rate of the information reconciliation have a significant impact on the secret key rate. For a fixed-rate multiedge-type low-density parity-check (LDPC) code, the reconciliation efficiency and frame error rate will inevitably vary due to the fluctuations of the signal-to-noise ratio (SNR) of the CV QKD system, which degrades the performance of the system. We propose a high-efficiency rate-adaptive information reconciliation scheme by combining raptorlike (RL) LDPC codes with the addition of trusted noises. We establish the model of adding trusted noises and combine it with the RL LDPC codes to optimize the secret key rate under the time-varying channel. The simulation results show that our scheme can maintain a high reconciliation efficiency of more than 94.4% and a low frame error rate within 15% fluctuation range of the SNR. Furthermore, we implement the hardware acceleration of the proposed rate-adaptive scheme on a graphics processing unit and achieve a decoding throughput of 65.5 Mbits/s by optimizing the storage of the parity-check matrix. Our results are useful for the practical CV QKD under the realistic time-varying channel.
Abstract Error correction is a significant step in postprocessing of continuous-variable quantum key distribution system, which is used to make two distant legitimate parties share identical corrected keys. We propose an experiment demonstration of high speed error correction with multi-edge type low-density parity check (MET-LDPC) codes based on graphic processing unit (GPU). GPU supports to calculate the messages of MET-LDPC codes simultaneously and decode multiple codewords in parallel. We optimize the memory structure of parity check matrix and the belief propagation decoding algorithm to reduce computational complexity. Our results show that GPU-based decoding algorithm greatly improves the error correction speed. For the three typical code rate, i.e., 0.1, 0.05 and 0.02, when the block length is 10 6 and the iteration number are 100, 150 and 200, the average error correction speed can be respectively achieved to 30.39 Mbits/s (over three times faster than previous demonstrations), 21.23 Mbits/s and 16.41 Mbits/s with 64 codewords decoding in parallel, which supports high-speed real-time continuous-variable quantum key distribution system.