Current quantum technology is approaching the system sizes and fidelities required for quantum error correction. It is therefore important to determine exactly what is needed for proof-of-principle experiments, which will be a major step towards fault-tolerant quantum computation. Here we propose a surface code based experiment that is the smallest, both in terms of code size and circuit depth, that would allow errors to be detected and corrected for both the $X$ and $Z$ bases of a qubit. This requires 17 physical qubits initially prepared in a product state, on which 16 two-qubit entangling gates are applied before a final measurement of all qubits. A platform agnostic error model is applied to give some idea of the noise levels required for success. It is found that a true demonstration of quantum error correction will require fidelities for the preparation and measurement of qubits and the entangling gates to be above $99%$.
Current quantum technology is approaching the system sizes and fidelities required for quantum error correction. It is therefore important to determine exactly what is needed for proof-of-principle experiments, which will be a major step towards fault-tolerant quantum computation. Here we propose a surface code based experiment that is the smallest, both in terms of code size and circuit depth, that would allow errors to be detected and corrected for both the X and Z bases of a qubit. This requires 17 physical qubits initially prepared in a product state, on which 16 two-qubit entangling gates are applied before a final measurement of all qubits. A platform agnostic error model is applied to give some idea of the noise levels required for success. It is found that a true demonstration of quantum error correction will require fidelities for the preparation and measurement of qubits and the entangling gates to be above 99.
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit.
We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.
Current quantum technology is approaching the system sizes and fidelities required for quantum error correction. It is therefore important to determine exactly what is needed for proof-of-principle experiments, which will be the first major step towards fault-tolerant quantum computation. Here we propose an experiment using the smallest surface code that would allow errors to be detected and corrected for both the X and Z basis of a qubit. This requires 17 physical qubits initially prepared in a product state, on which 16 two-qubit entangling gates are applied before a final measurement of all qubits. Using a realistic error model, it is found that this set-up could successfully demonstrate error correction with two qubit gate fidelities greater that 91% and mesurement fidelities greater than 96%. Fidelities of greater than 99%, however, are required to demonstrate a more convincing route to scalability.
Abstract The accumulation of physical errors 1–3 prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction 4 promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such that the physical errors are suppressed enough to allow running a desired computation with tolerable fidelity. Quantum error correction becomes practically realizable once the physical error rate is below a threshold value that depends on the choice of quantum code, syndrome measurement circuit and decoding algorithm 5 . We present an end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes 6 . Our approach achieves an error threshold of 0.7% for the standard circuit-based noise model, on par with the surface code 7–10 that for 20 years was the leading code in terms of error threshold. The syndrome measurement cycle for a length- n code in our family requires n ancillary qubits and a depth-8 circuit with CNOT gates, qubit initializations and measurements. The required qubit connectivity is a degree-6 graph composed of two edge-disjoint planar subgraphs. In particular, we show that 12 logical qubits can be preserved for nearly 1 million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of 0.1%, whereas the surface code would require nearly 3,000 physical qubits to achieve said performance. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors.
Quantum computers are far more error-prone than their classical counterparts. Therefore, to build a quantum computer capable of running large-scale quantum algorithms, we must use the techniques of quantum error correction to ensure that the computer produces the correct output even when its components are unreliable. However, the resource requirements of building such a fault-tolerant quantum computer are currently prohibitive. Here, we examine the utility of using three-dimensional (3D) surface codes in a fault-tolerant quantum computer. This family of topological error-correcting codes is a generalization of the well-known 2D surface code to three spatial dimensions. We show that certain 3D surface codes have a transversal logical non-Clifford gate. In a quantum computing architecture, a non-Clifford gate is required to achieve computational universality. Transversal gates do not entangle qubits in different codes, so they are naturally fault tolerant because they do not spread errors. Next, we consider the problem of decoding 3D surface codes. In a quantum error-correcting code, we cannot observe the qubits directly, so we measure parity-check operators to gain information about the state of the code. Decoding is the problem of estimating what error has occurred given a list of unsatisfied parity checks. We observe that 3D surface codes offer asymmetric protection against bit-flip and phase-flip errors, but in both cases, we find that a threshold error rate exists below which we can suppress logical errors by increasing the size of the code. We use our results about logical gates and decoding to propose two fault-tolerant quantum computing architectures that utilize 3D surface codes. Finally, we compare the resource requirements of our architectures with the requirements of leading quantum computing architectures based on topological codes. We find that one of our architectures may be competitive with the leading architectures, depending on the properties of the physical systems used to build the qubits.
Quantum error correction is an essential ingredient for universal quantum computing. Despite tremendous experimental efforts in the study of quantum error correction, to date, there has been no demonstration in the realisation of universal quantum error correction code (QECC), with the subsequent verification of all key features including the identification of an arbitrary physical error, the capability for transversal manipulation of the logical state, and state decoding. To address this notoriously difficult challenge, we push the limits of the depth of superconducting quantum circuits and experimentally realise the universal five-qubit QECC, the so-called smallest perfect code that permits corrections of generic single-qubit errors. In the experiment, having optimised the encoding circuit, we employ an array of superconducting qubits to realise the five-qubit QECC for several typical logical states including the magic state, an indispensable resource for realising non-Clifford gates. The encoded states are prepared with an average fidelity of 57.1(3)% while with a high fidelity of 98.6(1)% in the code space. Then, the arbitrary single-qubit errors introduced manually are identified by measuring the stabilizers. We further implement logical Pauli operations with a fidelity of 97.2(2)% within the code space. Finally, we realise the decoding circuit and recover the input state with a process fidelity of 57.4(7)%. After decoding, by identifying errors via the measurement of the four ancillae and then mathematically recovering the qubit state, we verify the power of error correction of this code. Thus, by demonstrating each key aspect of error correction with the five-qubit code, our work establishes the viability of experimental quantum error correction with superconducting qubits and paves the route to fault-tolerant quantum computing.
Fault-tolerant state preparation is essential for reliable quantum error correction, particularly in Steane-type error correction, which relies on robust ancilla states for syndrome readout. One method of fault-tolerant state preparation is to initialize multiple ancilla states and check them against each other to detect problematic errors. In the worst case, the number of states required for successful initialization grows polynomially with the code distance, but it has been shown that this can be reduced to constant ancilla overhead-in the best case, only four states are required. However, existing techniques for finding low-overhead initialization schemes are limited to codes with large symmetry groups, such as the Golay code. In this work, we propose a general, automated synthesis methodology for Steane-type fault-tolerant state preparation circuits that applies to arbitrary Calderbank-Shor-Steane (CSS) codes and does not rely on code symmetries. We apply the proposed methods to various CSS codes up to a distance of seven and simulate the successful fault-tolerant initialization of logical basis states under circuit-level depolarizing noise. The circuits synthesized using the proposed methodology provide an important step towards experimental realizations of high-fidelity ancilla states for near-term demonstration of fault-tolerant quantum computation.