Fault-tolerant quantum computing in systems composed of both Majorana fermions and topologically unprotected quantum systems, e.g., superconducting circuits or quantum dots, is studied in this Letter. Errors caused by topologically unprotected quantum systems need to be corrected with error-correction schemes, for instance, the surface code. We find that the error-correction performance of such a hybrid topological quantum computer is not superior to a normal quantum computer unless the topological charge of Majorana fermions is insusceptible to noise. If errors changing the topological charge are rare, the fault-tolerance threshold is much higher than the threshold of a normal quantum computer and a surface-code logical qubit could be encoded in only tens of topological qubits instead of about 1,000 normal qubits.
Fault-tolerant quantum computing in systems composed of both Majorana fermions and topologically unprotected quantum systems, e.g., superconducting circuits or quantum dots, is studied in this Letter. Errors caused by topologically unprotected quantum systems need to be corrected with error-correction schemes, for instance, the surface code. We find that the error-correction performance of such a hybrid topological quantum computer is not superior to a normal quantum computer unless the topological charge of Majorana fermions is insusceptible to noise. If errors changing the topological charge are rare, the fault-tolerance threshold is much higher than the threshold of a normal quantum computer and a surface-code logical qubit could be encoded in only tens of topological qubits instead of about 1,000 normal qubits.
An important approach to fault-tolerant quantum computation is protecting logical information using quantum error correction. Usually, logical information is in the form of logical qubits, which are encoded in physical qubits using quantum error correction codes. Compared with qubit quantum computation, fermionic quantum computation has advantages in quantum simulations of fermionic systems, e.g., molecules. In this paper, we show that fermionic quantum computation can be universal and fault tolerant if we encode logical Majorana fermions in physical Majorana fermions. We take a color code as an example to demonstrate the universal set of fault-tolerant operations on logical Majorana fermions, and we numerically find that the fault-tolerance threshold is about 0.8.
Quantum computers are devices that can solve certain problems faster than ordinary, classical computers. The fundamental units of quantum information are qubits, superpositions of two states, a "zero" state and a "one" state. There are various approaches to construct such two-level systems, among others, using superconducting circuits, trapped ions or photons. A common feature of these physical systems is that their coherence times are relatively short compared to the length of useful computations. Superconducting qubits, for instance, are currently the most advanced solid-state qubits, but they decohere after around 100 microseconds, and any information stored in these qubits is lost. On the other hand, useful quantum computations may require quantum information to survive on time scales that are many orders of magnitude longer, as their runtimes can reach several hours or even days. Topological quantum computing is an approach to construct qubits that survive for the entire duration of such a long computation. Topological quantum computing comes in two flavors. The condensed matter approach is to build error-resilient qubits using exotic quasiparticles in topological materials, most prominently Majorana zero modes in topological superconductors. Even though no such qubit has been built to date, the hope is that their coherence times may be significantly longer than the coherence times of currently available solid-state qubits, but are still expected to be too short for large-scale quantum computing. The quantum information approach is to combine many error-prone qubits to build more robust logical qubits using topological error-correcting codes, e.g., surface codes. Even though the first approach is hardware-based and the second approach is software-based, they are deeply related. With Majorana-based qubits, the main logical operations are Majorana fermion parity measurements. By replacing Majorana-based qubits with surface-code patches and parity measurements with lattice-surgery operations, schemes for quantum computation with Majorana-based qubits or with surface codes can be identical. In this thesis, we explore how to construct a large-scale topological fault-tolerant quantum computer that can perform useful quantum computations. Here, topological refers to the nature of the quantum error-correcting code, while the underlying hardware may be based on non-topological qubits, but could also be composed of Majorana-based qubits. We provide a complete picture of such a large-scale device, breaking down large quantum computations into logical qubits and logical operations, describing how these logical operations are performed on the level of physical qubits and physical gates, and finally discussing how these physical qubits can be pieced together in a Majorana-based system using topological superconducting nanowires.
We propose a physical realization of a commuting Hamiltonian of interacting Majorana fermions realizing Z 2 topological order, using an array of Josephson-coupled topological superconductor islands. The required multi-body interaction Hamiltonian is naturally generated by a combination of charging energy induced quantum phase-slips on the superconducting islands and electron tunneling between islands. Our setup improves on a recent proposal for implementing a Majorana fermion surface code (Vijay et al 2015 Phys. Rev. X 5 041038 ), a 'hybrid' approach to fault-tolerant quantum computation that combines (1) the engineering of a stabilizer Hamiltonian with a topologically ordered ground state with (2) projective stabilizer measurements to implement error correction and a universal set of logical gates. Our hybrid strategy has advantages over the traditional surface code architecture in error suppression and single-step stabilizer measurements, and is widely applicable to implementing stabilizer codes for quantum computation.
In this short review, I draw attention to new developments in the theory of fault tolerance in quantum computation that may give concrete direction to future work in the development of superconducting qubit systems. The basics of quantum error-correction codes, which I will briefly review, have not significantly changed since their introduction 15 years ago. But an interesting picture has emerged of an efficient use of these codes that may put fault-tolerant operation within reach. It is now understood that two-dimensional surface codes, close relatives of the original toric code of Kitaev, can be adapted as shown by Raussendorf and Harrington to effectively perform logical gate operations in a very simple planar architecture, with error thresholds for fault-tolerant operation simulated to be 0.75%. This architecture uses topological ideas in its functioning, but it is not 'topological quantum computation'—there are no non-abelian anyons in sight. I offer some speculations on the crucial pieces of superconducting hardware that could be demonstrated in the next couple of years that would be clear stepping stones towards this surface-code architecture.
Quantum computers are far more error-prone than their classical counterparts. Therefore, to build a quantum computer capable of running large-scale quantum algorithms, we must use the techniques of quantum error correction to ensure that the computer produces the correct output even when its components are unreliable. However, the resource requirements of building such a fault-tolerant quantum computer are currently prohibitive. Here, we examine the utility of using three-dimensional (3D) surface codes in a fault-tolerant quantum computer. This family of topological error-correcting codes is a generalization of the well-known 2D surface code to three spatial dimensions. We show that certain 3D surface codes have a transversal logical non-Clifford gate. In a quantum computing architecture, a non-Clifford gate is required to achieve computational universality. Transversal gates do not entangle qubits in different codes, so they are naturally fault tolerant because they do not spread errors. Next, we consider the problem of decoding 3D surface codes. In a quantum error-correcting code, we cannot observe the qubits directly, so we measure parity-check operators to gain information about the state of the code. Decoding is the problem of estimating what error has occurred given a list of unsatisfied parity checks. We observe that 3D surface codes offer asymmetric protection against bit-flip and phase-flip errors, but in both cases, we find that a threshold error rate exists below which we can suppress logical errors by increasing the size of the code. We use our results about logical gates and decoding to propose two fault-tolerant quantum computing architectures that utilize 3D surface codes. Finally, we compare the resource requirements of our architectures with the requirements of leading quantum computing architectures based on topological codes. We find that one of our architectures may be competitive with the leading architectures, depending on the properties of the physical systems used to build the qubits.
The threshold theorem indicates that if errors are all local and their rates are below a certain threshold, it is possible to implement large scale quantum computation with arbitrarily small error based on active quantum error correction (QEC). However, most fault-tolerant quantum computation (FTQC) schemes require enormous overhead to achieve this rate by increasing either the concatenation levels for concatenated codes or the distance (hence the size) for topological codes. As a result, a logical qubit is usually encoded in more than thousands of physical qubits, even when the error rate is below the threshold. In this thesis, we try to reduce the resource overhead of FTQC. We first study a quantum computation scheme using clouds of atoms trapped on atomic chips. It suggests that this scheme is robust to noise to some extent and has potential to be scalable. Secondly, we propose a FTQC scheme of encoding many logical qubits into large code blocks. The error performance of such scheme is numerically studied. Preparation of various ancilla states necessary for computation is also explored. Thirdly, we explore the idea of introducing energy gap to suppress thermal noise on each qubit. We show that fault-tolerant holonomic quantum computation (HQC) can be implemented in stabilizer codes with the existence of such energy protection. Especially, we studied fault-tolerant HQC in surface codes in detail. This scheme opens the possibility for self-correcting quantum computation in 2D lattice.