In fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platforms. Optimizing these circuits within the constraints of today's quantum computing technologies, particularly in terms of error rates, qubit counts, and network topologies, holds substantial implications for the feasibility of quantum applications in the near future. This paper presents a toolkit for designing and analyzing fault-tolerant quantum circuits. We introduce a framework for representing stabilizer circuits using classical low-density parity-check (LDPC) codes. Each codeword in the representation corresponds to a quantum-mechanical equation regarding the circuit, formalizing the correlations utilized in parity checks and delineating logical operations within the circuit. Consequently, the LDPC code provides a means of quantifying fault tolerance and verifying logical operations. We outline the procedure for generating LDPC codes from circuits using the Tanner graph notation, alongside proposing graph-theory tools for constructing fault-tolerant quantum circuits from classical LDPC codes. These findings offer a systematic approach to applying classical error correction techniques in optimizing existing fault-tolerant protocols and developing new ones. As an example, we develop a resource-efficient scheme for universal fault-tolerant quantum computing on hypergraph product codes based on the LDPC representation.In fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platforms. Optimizing these circuits within the constraints of today's quantum computing technologies, particularly in terms of error rates, qubit counts, and network topologies, holds substantial implications for the feasibility of quantum applications in the near future. This paper presents a toolkit for designing and analyzing fault-tolerant quantum circuits. We introduce a framework for representing stabilizer circuits using classical low-density parity-check (LDPC) codes. Each codeword in the representation corresponds to a quantum-mechanical equation regarding the circuit, formalizing the correlations utilized in parity checks and delineating logical operations within the circuit. Consequently, the LDPC code provides a means of quantifying fault tolerance and verifying logical operations. We outline the procedure for generating LDPC codes from circuits using the Tanner graph notation, alongside proposing graph-theory tools for constructing fault-tolerant quantum circuits from classical LDPC codes. These findings offer a systematic approach to applying classical error correction techniques in optimizing existing fault-tolerant protocols and developing new ones. As an example, we develop a resource-efficient scheme for universal fault-tolerant quantum computing on hypergraph product codes based on the LDPC representation.

arXiv:2403.10268Physical Review ResearchJan 30, 20252 citations

Designing fault-tolerant circuits using detector error models

Derks, Peter-Jan H. S., Townsend-Teague, Alex, Burchards, Ansgar G. +1 more

Quantum error-correcting codes, such as subspace, subsystem, and Floquet codes, are typically constructed within the stabilizer formalism, which does not fully capture the idea of fault tolerance needed for practical quantum computing applications. In this work, we explore the remarkably powerful formalism of detector error models, which fully captures fault-tolerance at the circuit level. We introduce the detector error model formalism in a pedagogical manner and provide several examples. Additionally, we apply the formalism to three different levels of abstraction in the engineering cycle of fault-tolerant circuit designs: finding robust syndrome extraction circuits, identifying efficient measurement schedules, and constructing fault-tolerant procedures. We enhance the surface code's resistance to measurement errors, devise short measurement schedules for color codes, and implement a more efficient fault-tolerant method for measuring logical operators.Quantum error-correcting codes, such as subspace, subsystem, and Floquet codes, are typically constructed within the stabilizer formalism, which does not fully capture the idea of fault tolerance needed for practical quantum computing applications. In this work, we explore the remarkably powerful formalism of detector error models, which fully captures fault-tolerance at the circuit level. We introduce the detector error model formalism in a pedagogical manner and provide several examples. Additionally, we apply the formalism to three different levels of abstraction in the engineering cycle of fault-tolerant circuit designs: finding robust syndrome extraction circuits, identifying efficient measurement schedules, and constructing fault-tolerant procedures. We enhance the surface code's resistance to measurement errors, devise short measurement schedules for color codes, and implement a more efficient fault-tolerant method for measuring logical operators.

Jan 1, 20250 citations

Practicality of Fault-Tolerant Quantum Computation

Simon J. Devitt, Austin G. Fowler, Lloyd C. L. Hollenberg

Jan 1, 20050 citations

Designing fault-tolerant circuits using detector error models

Peter-Jan H. S. Derks, Alex Townsend-Teague, Ansgar G. Burchards +1 more

Quantum error-correcting codes, such as subspace, subsystem, and Floquet codes, are typically constructed within the stabilizer formalism, which does not fully capture the idea of fault-tolerance needed for practical quantum computing applications. In this work, we explore the remarkably powerful formalism of detector error models, which fully captures fault-tolerance at the circuit level. We introduce the detector error model formalism in a pedagogical manner and provide several examples. Additionally, we apply the formalism to three different levels of abstraction in the engineering cycle of fault-tolerant circuit designs: finding robust syndrome extraction circuits, identifying efficient measurement schedules, and constructing fault-tolerant procedures. We enhance the surface code's resistance to measurement errors, devise short measurement schedules for color codes, and implement a more efficient fault-tolerant method for measuring logical operators.Quantum error-correcting codes, such as subspace, subsystem, and Floquet codes, are typically constructed within the stabilizer formalism, which does not fully capture the idea of fault-tolerance needed for practical quantum computing applications. In this work, we explore the remarkably powerful formalism of detector error models, which fully captures fault-tolerance at the circuit level. We introduce the detector error model formalism in a pedagogical manner and provide several examples. Additionally, we apply the formalism to three different levels of abstraction in the engineering cycle of fault-tolerant circuit designs: finding robust syndrome extraction circuits, identifying efficient measurement schedules, and constructing fault-tolerant procedures. We enhance the surface code's resistance to measurement errors, devise short measurement schedules for color codes, and implement a more efficient fault-tolerant method for measuring logical operators.

arXiv:2407.13826Jul 18, 20244 citations

Fault-Tolerant Error Detection Above Break-Even for Multi-Qubit Gates

Colburn Riffel, Reece Robertson, Peter Hendrickson

A fully fault-tolerant implementation of the quantum error-detecting Iceberg $[[2m, 2m-2, 2]]$ code applied to a Toffoli circuit achieved beyond-break-even error detection on a leading trapped-ion quantum computer, where the effect of encoding a circuit with a quantum error-detection code enables increased fidelity compared to an unencoded circuit. This code was also applied to Bell state preparation circuits, where a lean non-fault-tolerant implementation of the Iceberg code enables a fidelity gain as well. This highlights the important point that, at least for small-scale circuits with a substantial portion of error-free runs, it can be effective simply to use error detection to filter out the runs with errors. Furthermore, experiments performed in this work highlight the necessity for judicious compilation of circuits not only for a given hardware but also within a quantum error detection code.A fully fault-tolerant implementation of the quantum error-detecting Iceberg $[[2m, 2m-2, 2]]$ code applied to a Toffoli circuit achieved beyond-break-even error detection on a leading trapped-ion quantum computer, where the effect of encoding a circuit with a quantum error-detection code enables increased fidelity compared to an unencoded circuit. This code was also applied to Bell state preparation circuits, where a lean non-fault-tolerant implementation of the Iceberg code enables a fidelity gain as well. This highlights the important point that, at least for small-scale circuits with a substantial portion of error-free runs, it can be effective simply to use error detection to filter out the runs with errors. Furthermore, experiments performed in this work highlight the necessity for judicious compilation of circuits not only for a given hardware but also within a quantum error detection code.

quant-pharXiv:2604.13219Apr 16, 20260 citations

A fully fault-tolerant implementation of the quantum error-detecting Iceberg

[[2m, 2m-2, 2]]

code applied to a Toffoli circuit achieved beyond-break-even error detection on a leading trapped-ion quantum computer, where the effect of encoding a circuit with a quantum error-detection code enables increased fidelity compared to an unencoded circuit. This code was also applied to Bell state preparation circuits, where a lean non-fault-tolerant implementation of the Iceberg code enables a fidelity gain as well. This highlights the important point that, at least for small-scale circuits with a substantial portion of error-free runs, it can be effective simply to use error detection to filter out the runs with errors. Furthermore, experiments performed in this work highlight the necessity for judicious compilation of circuits not only for a given hardware but also within a quantum error detection code.