In leading fault-tolerant quantum computing schemes, accurate transformation are obtained by a two-stage process. In a first stage, a discrete, universal set of fault-tolerant operations is obtained by error-correcting noisy transformations and distilling resource states. In a second stage, arbitrary transformations are synthesized to desired accuracy by combining elements of this set into a circuit. Here, we present a scheme which merges these two stages into a single one, directly distilling complex transformations. We find that our scheme can reduce the total overhead to realize certain gates by up to a few orders of magnitude. In contrast to other schemes, this efficient gate synthesis does not require computationally intensive compilation algorithms, and a straightforward generalization of our scheme circumvents compilation and synthesis altogether.
In leading fault-tolerant quantum computing schemes, accurate transformation are obtained by a two-stage process. In a first stage, a discrete, universal set of fault-tolerant operations is obtained by error-correcting noisy transformations and distilling resource states. In a second stage, arbitrary transformations are synthesized to desired accuracy by combining elements of this set into a circuit. Here, we present a scheme which merges these two stages into a single one, directly distilling complex transformations. We find that our scheme can reduce the total overhead to realize certain gates by up to a few orders of magnitude. In contrast to other schemes, this efficient gate synthesis does not require computationally intensive compilation algorithms, and a straightforward generalization of our scheme circumvents compilation and synthesis altogether.
Efficient constructions for quantum logic are essential since quantum computation is experimentally challenging. This thesis develops quantum logic synthesis as a paradigm for reducing the resource overhead in fault-tolerant quantum computing. The model for error correction considered here is the surface code. After developing the theory behind general logic synthesis, the resource costs of magic-state distillation for the T=exp(iπ(I−Z)/8) gate are quantitatively analyzed. The resource costs for a relatively new protocol distilling multi-qubit Fourier states are calculated for the first time. Four different constructions of the fault-tolerant Toffoli gate, including two which incorporate error detection, are analyzed and compared. The techniques of logic synthesis reduce the cost of fault-tolerant quantum computation by one to two orders of magnitude, depending on which benchmark is used. Using resource analysis for T gates and Toffoli gates, several proposals for constructing arbitrary quantum gates are compared, including "Clifford+T" sequences, V-basis sequences, phase kickback, and programmable ancilla rotations. The application of arbitrary gates to quantum algorithms for simulating chemistry is discussed as well. Finally, the thesis examines the techniques which lead to efficient constructions of quantum logic, and these observations point to even broader applications of logic synthesis.
The standard approach to fault-tolerant quantum computation is to store information in a quantum error correction code, such as the surface code, and process information using a strategy that can be summarized as distill then synthesize. In the distill step, one performs several rounds of distillation to create high-fidelity logical qubits in a magic state. Each such magic state provides one good T gate. In the synthesize step, one seeks the optimal decomposition of an algorithm into a sequence of many T gates interleaved with Clifford gates. This gate-synthesis problem is well understood for multiqubit gates that do not use any Hadamards. We present an in-depth analysis of a unified framework that realizes one round of distillation and multiqubit gate synthesis in a single step. We call these synthillation protocols, and show they lead to a large reduction in resource overheads. This is because synthillation can implement a general class of circuits using the same number of T states as gate synthesis, yet with the benefit of quadratic error suppression. This general class includes all circuits primarily dominated by control-control-Z gates, such as adders and modular exponentiation routines used in Shor's algorithm. Therefore, synthillation removes the need for a costly round of magic state distillation. We also present several additional results on the multiqubit gate-synthesis problem. We provide an efficient algorithm for synthesizing unitaries with the same worst-case resource scaling as optimal solutions. For the special case of synthesizing controlled unitaries, our techniques are not just efficient but exactly optimal. We observe that the gate-synthesis cost, measured by T count, is often strictly subadditive. Numerous explicit applications of our techniques are also presented.
Quantum computation promises exponential or polynomial speedups over classical computation for a wide range of problems, including integer factoring, quantum chemistry, and linear-system solving.However, current quantum devices remain too noisy to execute complex algorithms reliably.Overcoming this noise and achieving quantum advantage require a fault-tolerant quantum computer (FTQC).The resource overhead associated with fault-tolerant operation is substantial, and reducing this overhead remains one of the central challenges.A major source of this overhead arises from the implementation of non-Clifford gates, which are essential for universal quantum computation.A non-Clifford gate such as the T gate is implemented using a special quantum state known as a magic state, which is prepared via a process called magic state distillation.Magic state distillation is resource-intensive and remains a major bottleneck in FTQC.Hence, reducing the distillation overhead is necessary to lower the overall FTQC overhead.The large overhead of magic state distillation has significantly influenced FTQC architectures.In particular, it has motivated compilation schemes optimized under the constraint of expensive magic state distillation.While reducing the distillation overhead is crucial, it is not sufficient; lowering the overall FTQC overhead also requires revisiting design choices guided by this constraint.Therefore, efficient methods are required not only for preparing magic states but also for consuming them.In this thesis, we reduce the overhead of fault-tolerant quantum computation by focusing on the preparation and consumption of magic states.In contrast to traditional logical-level distillation, physical-level distillation allows direct implementation with physical gates and has the potential to drastically reduce the distillation overhead.However, existing physical-level distillation protocols, such as zero-level distillation, cannot directly yield high-fidelity magic states.We propose two magic state distillation protocols that use physical-level distillation techniques to efficiently prepare high-fidelity magic states.The first protocol is a two-level distillation protocol using physical-level distillation as the first-level stage.The second protocol utilizes lattice surgery to reduce the spacetime overhead of a physical-level distillation protocol.The former targets a high-fidelity regime, whereas the latter targets an intermediate-fidelity regime-lower than the former, but higher than zero-level distillation.Next, we investigate FTQC architectures that can efficiently consume the magic states prepared by these protocols.Because magic state distillation is probabilistic, occasional failures can delay computation.Moreover, physical-level distillation protocols generally exhibit higher failure probabilities than logical-level ones.This delay is amplified by parallel execution, making it an i ii important consideration for FTQC using physical-level distillation protocols.We therefore propose a scheme to mitigate the negative performance impact caused by magic state distillation failures by introducing a pool of magic states for each distillation factory.The proposed distillation protocols allow the simultaneous preparation of many magic states.Leveraging this capability, we propose an FTQC compilation scheme optimized for highly parallel quantum algorithms.By performing magic state distillation locally and consuming magic states in parallel, the scheme enables highly parallel execution and consequently reduces the computational time overhead.Overall, this thesis presents a unified approach to reducing the overhead of fault-tolerant quantum computation.By improving both the preparation and consumption of magic states, it advances the design of resource-efficient FTQC architectures.These results demonstrate that efficient magic state preparation motivates efficient magic state consumption, and vice versa.Together, they bring us closer to the practical realization of fault-tolerant quantum computers.
For universal quantum computation, a major challenge to overcome for practical implementation is the large amount of resources required for fault-tolerant quantum information processing. An important aspect is implementing arbitrary unitary operators built from logical gates within the quantum error correction code. A synthesis algorithm can be used to approximate any unitary gate up to arbitrary precision by assembling sequences of logical gates chosen from a small set of universal gates that are fault-tolerantly performable while encoded in a quantum error-correction code. However, current procedures do not yet support individual assignment of base gate costs and many do not support extended sets of universal base gates. We analysed cost-optimal sequences using an exhaustive search based on Dijkstra’s pathfinding algorithm for the canonical Clifford+ T set of base gates and compared them to when additionally including Z -rotations from higher orders of the Clifford hierarchy. Two approaches of assigning base gate costs were used. First, costs were reduced to T -counts by recursively applying a Z -rotation catalyst circuit. Second, costs were assigned as the average numbers of raw (i.e. physical level) magic states required to directly distil and implement the gates fault-tolerantly. We found that the average sequence cost decreases by up to 54±3% when using the Z -rotation catalyst circuit approach and by up to 33±2% when using the magic state distillation approach. In addition, we investigated observed limitations of certain assignments of base gate costs by developing an analytic model to estimate the proportion of sets of Z -rotation gates from higher orders of the Clifford hierarchy that are found within sequences approximating random target gates.
Quantum error correction and fault-tolerance are at the heart of any scalable quantum computation architecture. Developing a set of tools that satisfy the requirements of fault- tolerant schemes is thus of prime importance for future quantum information processing implementations. The Clifford gate set has the desired fault-tolerant properties, preventing bad propagation of errors within encoded qubits, for many quantum error correcting codes, yet does not provide full universal quantum computation. Preparation of magic states can enable universal quantum computation in conjunction with Clifford operations, however preparing magic states experimentally will be imperfect due to implementation errors. Thankfully, there exists a scheme to distill pure magic states from prepared noisy magic states using only operations from the Clifford group and measurement in the Z-basis, such a scheme is called magic state distillation [1]. This work investigates the robustness of magic state distillation to faults in state preparation and the application of the Clifford gates in the protocol. We establish that the distillation scheme is robust to perturbations in the initial state preparation and characterize the set of states in the Bloch sphere that converge to the T-type magic state in different fidelity regimes. Additionally, we show that magic state distillation is robust to low levels of gate noise and that performing the distillation scheme using noisy Clifford gates is a more efficient than using encoded fault-tolerant gates due to the large overhead in fault-tolerant quantum computing architectures.