This work compares the overhead of quantum error correction with concatenated and topological quantum error-correcting codes. To perform a numerical analysis, we use the Quantum Resource Estimator Toolbox (QuRE) that we recently developed. We use QuRE to estimate the number of qubits, quantum gates, and amount of time needed to factor a 1024-bit number on several candidate quantum technologies that differ in their clock speed and reliability. We make several interesting observations. First, topological quantum error correction requires fewer resources when physical gate error rates are high, white concatenated codes have smaller overhead for physical gate error rates below approximately 10E-7. Consequently, we show that different error-correcting codes should be chosen for two of the studied physical quantum technologies - ion traps and superconducting qubits. Second, we observe that the composition of the elementary gate types occurring in a typical logical circuit, a fault-tolerant circuit protected by the surface code, and a fault-tolerant circuit protected by a concatenated code all differ. This also suggests that choosing the most appropriate error correction technique depends on the ability of the future technology to perform specific gates efficiently.
Designing quantum error correcting codes that promise a high error threshold, low resource overhead, and efficient decoding algorithms is crucial to achieve large-scale fault-tolerant quantum computation. The concatenated quantum Hamming code is one of the potential candidates that allows for constant space overhead and efficient decoding. We study the concatenation of surface codes with quantum Hamming codes as a quantum memory, and estimate its error threshold, resource overhead, and decoding time. A high error threshold is achieved, which can in principle be pushed up to the threshold of the surface code. Furthermore, the concatenated codes can suppress logical errors to a much lower level than the surface codes, under the assumption of comparable amount of resource overhead. The advantage in suppressing errors starts to show for a quantum memory of intermediate scale. Concatenating surface codes with quantum Hamming codes therefore provides a promising avenue to demonstrate small-scale fault-tolerant quantum circuits in the near future, and also paves a way for large-scale fault-tolerant quantum computation.
We analyze the resource overhead of recently proposed methods for universal fault-tolerant quantum computation using concatenated codes. Namely, we examine the concatenation of the 7-qubit Steane code with the 15-qubit Reed-Muller code, which allows for the construction of the 49- and 105-qubit codes that do not require the need for magic state distillation for universality. We compute a lower bound for the adversarial noise threshold of the 105-qubit code and find it to be $8.33\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}6}.$ We obtain a depolarizing noise threshold for the 49-qubit code of $9.69\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}4}$ which is competitive with the 105-qubit threshold result of $1.28\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}3}$. We then provide lower bounds on the resource requirements of the 49- and 105-qubit codes and compare them with the surface code implementation of a logical
T gate using magic state distillation. For the sampled input error rates and noise model, we find that the surface code achieves a smaller overhead compared to our concatenated schemes.
To solve problems of practical importance1,2, quantum computers probably need to incorporate quantum error correction, in which a logical qubit is redundantly encoded in many noisy physical qubits3–5. The large physical-qubit overhead associated with error correction motivates the search for more hardware-efficient approaches6–18. Here, using a superconducting quantum circuit19, we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance d = 5 (ref. 10). A stabilizing circuit passively protects cat qubits against bit flips20–24. The repetition code, using ancilla transmons for syndrome measurement, corrects cat qubit phase flips. We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below the threshold. The logical bit-flip error is suppressed with increasing cat qubit mean photon number, enabled by our realization of a cat-transmon noise-biased CX gate. The minimum measured logical error per cycle is on average 1.75(2)% for the distance-3 code sections, and 1.65(3)% for the distance-5 code. Despite the increased number of fault locations of the distance-5 code, the high degree of noise bias preserved during error correction enables comparable performance. These results, where the intrinsic error suppression of the bosonic encodings enables us to use a hardware-efficient outer error-correcting code, indicate that concatenated bosonic codes can be a compelling model for reaching fault-tolerant quantum computation. Bosonic qubits can be engineered to feature intrinsic protection against certain kinds of errors, which makes quantum error correction across many bosonic qubits possible with less overhead.
Fault-tolerant quantum error correction (QEC) networks are studied by a combination of numerical and approximate analytical treatments. The probability of failure of the recovery operation is calculated for a variety of Calderbank-Shor-Steane codes, including large block codes and concatenated codes. Recent insights into the syndrome extraction process, which render the whole process more efficient and more noise tolerant, are incorporated. The average number of recoveries that can be completed without failure is thus estimated as a function of various parameters. The main parameters are the gate $\ensuremath{\gamma}$ and memory $\ensuremath{\epsilon}$ failure rates, the physical scale-up of the computer size, and the time
tm required for measurements and classical processing. The achievable computation size is given as a surface in parameter space. This indicates the noise threshold as well as other information. It is found that concatenated codes based on the
[[23,1,7]] Golay code give higher thresholds than those based on the
[[7,1,3]] Hamming code under most conditions. The threshold gate noise ${\ensuremath{\gamma}}_{0}$ is a function of $\ensuremath{\epsilon}/\ensuremath{\gamma}$ and
tm; example values are ${\ensuremath{\epsilon}/\ensuremath{\gamma}{,t}_{m},{\ensuremath{\gamma}}_{0}}={{1,1,10}^{\ensuremath{-}3}},$ ${0.01,1,3\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}3}},$ ${{1,100,10}^{\ensuremath{-}4}},$ ${0.01,100,2\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}3}},$ assuming zero cost for information transport. This represents an order of magnitude increase in tolerated memory noise, compared with previous calculations, which is made possible by recent insights into the fault-tolerant QEC process.
A non-Clifford gate is required for universal quantum computation, and, typically, this is the most error-prone and resource-intensive logical operation on an error-correcting code. Small, single-qubit rotations are popular choices for this non-Clifford gate, but certain three-qubit gates, such as Toffoli or controlled-controlled-
Z (ccz), are equivalent options that are also more suited for implementing some quantum algorithms, for instance, those with coherent classical subroutines. Here, we calculate error rates and resource overheads for implementing logical ccz with pieceable fault tolerance, a nontransversal method for implementing logical gates. We provide a comparison with a nonlocal magic-state scheme on a concatenated code and a local magic-state scheme on the surface code. We find the pieceable fault-tolerance scheme particularly advantaged over magic states on concatenated codes and in certain regimes over magic states on the surface code. Our results suggest that pieceable fault tolerance is a promising candidate for fault tolerance in a near-future quantum computer.
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit.
We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.