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arXiv:1306.1254

A Single Universal n-bit Gate for Reversible Circuit Synthesis

Ahmed Younes

Published Jun 5, 2013• 2 citations
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Abstract

Many universal reversible libraries that contain more than one gate type have been proposed in the literature. Practical implementation of reversible circuits is much easier if a single gate type is used in the circuit construction. This paper proposes a reversible n-bit gate that is universal for reversible circuits synthesis. The proposed gate is extendable according to the size of the circuit. The paper shows that the size of the synthesized circuits using the proposed gate is comparable with the size of the synthesized circuits using the hybrid reversible libraries for 3-in/out reversible circuits.

DOI
10.48550/arxiv.1306.1254

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Many universal reversible libraries that contain more than one gate type have been proposed in the literature. Practical implementation of reversible circuits is much easier if a single gate type is used in the circuit construction. This paper proposes a reversible n-bit gate that is universal for reversible circuits synthesis. The proposed gate is extendable according to the size of the circuit. The paper shows that the size of the synthesized circuits using the proposed gate is comparable with the size of the synthesized circuits using the hybrid reversible libraries for 3-in/out reversible circuits.
Many universal reversible libraries of gates that contain more than one gate type have been proposed in the literature. Synthesis of reversible circuits is much simpler and more practical if a single gate type is used in the circuit construct ion. This paper proposes a novel reversible n-bit gate that is universal for reversible circuits synthes is. The proposed gate is extendable according to the number of bits in the circuit. The paper shows that the size of the synthesized circuits using the proposed gate is comparable with the size of the synthesized circuits using the known reversible libraries of gates.
We present new algorithms to synthesize exact universal reversible gate library for various types of gates and costs. We use the powerful algebraic software GAP for implementation and examination of our algorithms and the reversible logic synthesis problems have been reduced to group theory problems. It is shown that minimization of arbitrary cost functions of gates and orders of magnitude are faster than its previously counterparts for reversible logic synthesis. Experimental results show that a significant improvement over the previously proposed synthesis algorithm is obtained compared with the existing approaches to reversible logic synthesis.
Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates and at mini-length cost based on constructing the shortest coding and the specific topological compression; thus, the lossless compression ratio of the space of n -bit circuits reaches near 2×n! . This paper presents the first work to create all 3120218828 optimal 4-bit reversible circuits with up to 8 gates for the CNT (Controlled-NOT gate, NOT gate, and Toffoli gate) library, and it can quickly achieve 16 steps through specific cascading created circuits.
We present new algorithms to synthesize exact universal reversible gate library for various types of gates and costs. We use the powerful algebraic software GAP for implementation and examination of our algorithms and the reversible logic synthesis problems have been reduced to group theory problems. It is shown that minimization of arbitrary cost functions of gates and orders of magnitude are faster than its previously counterparts for reversible logic synthesis. Experimental results show that a significant improvement over the previously proposed synthesis algorithm is obtained compared with the existing approaches to reversible logic synthesis.
Reversible circuits play an important role in quantum computing, which is one of the most promising emerging technologies. In this paper, we investigate the problem of optimally synthesizing 4-bit reversible circuits. We present an enhanced bi-directional synthesis approach. Owing to the exponential nature of the memory and run-time complexity, all existing methods can only perform four steps for the Controlled-Not gate NOT gate, and Peres gate library. Our novel method can achieve 12 steps. As a result, we augment the number of circuits that can optimally be synthesized by over 5 × 106 times. We synthesized 1000 random 4-bit reversible circuits. The statistical analysis result supports our estimation. The quantum cost of our result is also better than the quantum cost of other approaches. The promising experimental results demonstrate the effectiveness of our approach.
Two questions have been addressed here: how many logic levels are necessary to synthesise a specific instance of a reversible circuit, and how much better to have large gate libraries, and what gates should be required in libraries. Group theory is applied to 3-bit reversible gate synthesis to create a library useful in hierarchical design. It has been shown that arbitrary 3-bit reversible circuit can be synthesised with four-logic levels, using this new gate library. The respective universal library for the four-level synthesis is constructed and optimised it on the level of nuclear magnetic resonance pulses. A very fast algorithm to synthesise arbitrary 3-bit reversible function to gates from our library is also presented. The algorithm demonstrates dramatic speed benefit and results in a maximum of four-level circuit for arbitrary 3-bit reversible function. The gates are optimised on the level of pulses to decrease their cost and allow for objective comparison with standard CNOT, NOT, Toffoli gates (CNT) circuits. This library guarantees a four-level circuit for any 3-qubit reversible function and is also intended to be used in a hierarchical design of larger circuits.