Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:1302.4122 · Physical Review A

Protected gates for superconducting qubits

Peter Brooks, Alexei Kitaev, John P. Preskill

Published May 6, 2013• 199 citations
arXivHTMLPDF

Abstract

We analyze the accuracy of quantum phase gates acting on ``0-$\ensuremath{\pi}$ qubits'' in superconducting circuits, where the gates are protected against thermal and Hamiltonian noise by continuous-variable quantum error-correcting codes. The gates are executed by turning on and off a tunable Josephson coupling between an $LC$ oscillator and a qubit or pair of qubits; assuming perfect qubits, we show that the gate errors are exponentially small when the oscillator's impedance $\sqrt{L/C}$ is large compared to $\ensuremath{\hbar}/4{e}^{2}\ensuremath{\approx}1\phantom{\rule{4pt}{0ex}}\mathrm{k}\ensuremath{\Omega}$. The protected gates are not computationally universal by themselves, but a scheme for universal fault-tolerant quantum computation can be constructed by combining them with unprotected noisy operations. We validate our analytic arguments with numerical simulations.

DOI
10.1103/physreva.87.052306

Related papers

Protected Phase Gate for the 0- π Qubit using its Internal Modes

X. C. Kolesnikow, Thomas B. Smith, Felix Thomsen +2 more

Protected superconducting qubits such as the 0- π qubit promise to substantially reduce physical error rates. However, a key challenge in the field is designing gates for these qubits that do not compromise their protection or become infeasibly slow as the protection of the qubit is improved. In this work we propose a protected phase gate that is compatible with the protected regime of the 0- π qubit and does not suffer from spurious coupling to additional circuit modes. Our gate utilizes an internal mode of the circuit as an ancilla and is achieved by varying the qubit-ancilla coupling via a tunable Josephson element. Through numerical simulations, we study how the gate error scales with the circuit parameters of the 0- π qubit and the tunable Josephson element that enacts the gate. Ultimately, we find that a protected gate with the 0- π qubit is possible with near-term circuit parameters. Our work opens up the possibility of performing protected gates on protected superconducting qubits, which may significantly reduce hardware overheads for quantum computation.

arXiv:2503.14634•PRX Quantum•Dec 9, 2025•2 citations

Protecting bosonic codes from ancilla-induced errors with continuous-variable flags

Thomas Décultot, Ronan Gautier, Mazyar Mirrahimi

Bosonic quantum error correction represents a route towards significant hardware overhead reduction for fault-tolerant quantum computation. However, controlling quantum harmonic oscillators that encode the quantum information comes with its own challenges. In many platforms such as superconducting circuits and trapped ions, the bosonic degree of freedom is controlled by an ancillary qubit whose decay during a qubit-oscillator gate propagates to the oscillator as a continuous error. Such errors generally lie beyond the scope of errors that the bosonic code is capable of correcting. We introduce the continuous-variable flag: an auxiliary oscillator coupled to the ancilla whose phase-space position encodes the continuous error corrupting the storage mode. After the gate, a heterodyne measurement of the flag estimates this continuous-variable error and a subsequent feedback control undoes it up to a bosonic code stabilizer. The scheme requires no new ingredients, as the flag is driven by the same dispersive coupling, displacements and rotations that implement the gates it is supposed to protect. We construct sequences protecting conditional rotations to all orders in ancilla decay with one flag, and conditional displacements to first order with one flag and to all orders with two. Simulations with realistic circuit-QED parameters predict more than three orders of magnitude fewer logical errors for the parity measurement of a four-component cat code, and a finite-energy GKP logical lifetime near its noiseless-ancilla bound. By discretizing continuous-variable errors, the flags introduced in this work are a useful tool for any hybrid oscillator-qubit processor, and open the route towards fault-tolerant simulation and computation with bosonic modes.

quant-pharXiv:2610.07139•Oct 7, 2026•0 citations

Protected qubit based on a superconducting current mirror

Alexei Kitaev

We propose a qubit implementation based on exciton condensation in capacitively coupled Josephson junction chains. The qubit is protected in the sense that all unwanted terms in its effective Hamiltonian are exponentially suppressed as the chain length increases. We also describe an implementation of a universal set of quantum gates. Most gates also offer exponential error suppression. The only gate that is not intrinsically fault-tolerant needs to be realized with about 50% precision, provided the other gates are exact.

arXiv:cond-mat/0609441•Sep 19, 2006•20 citations

Dynamically protected cat-qubits: a new paradigm for universal quantum computation

Mazyar Mirrahimi, Zaki Leghtas, Victor V. Albert +3 more

Abstract. We present a new hardware-efficient paradigm for universal quantum computation which is based on encoding, protecting and manipulating quantum information in a quantum harmonic oscillator. This proposal exploits multi-photon driven dissipative processes to encode quantum information in logical bases composed of Schrödinger cat states. More precisely, we consider two schemes. In a first scheme, a two-photon driven dissipative process is used to stabilize a logical qubit basis of two-component Schrödinger cat states. While such a scheme ensures a protection of the logical qubit against the photon dephasing errors, the prominent error channel of single-photon loss induces bit-flip type errors that cannot be corrected. Therefore, we consider a second scheme based on a four-photon driven dissipative process which leads to the choice of four-component Schrödinger cat states as the logical qubit. Such a logical qubit can be protected against single-photon loss by continuous photon number parity measurements. Next, applying some specific Hamiltonians, we provide a set of universal quantum gates on the encoded qubits of each of the two schemes. In particular, we illustrate how these operations can be rendered fault-tolerant with respect to various decoherence channels of participating quantum systems. Finally, we also propose experimental schemes based on quantum superconducting circuits and inspired by methods used in Josephson parametric amplification, which should allow to achieve these driven dissipative processes along with the Hamiltonians ensuring the universal operations in an efficient manner. ar

•Aug 15, 2016•500 citations

Quantum Logic Gates for Coupled Superconducting Phase Qubits

Frederick W. Strauch, Philip R. Johnson, Alex J. Dragt +3 more

Based on a quantum analysis of two capacitively coupled current-biased Josephson junctions, we propose two fundamental two-qubit quantum logic gates. Each of these gates, when supplemented by single-qubit operations, is sufficient for universal quantum computation. Numerical solutions of the time-dependent Schrödinger equation demonstrate that these operations can be performed with good fidelity.

arXiv:quant-ph/0303002•Physical Review Letters•Oct 16, 2003•208 citations

Lower overhead fault-tolerant building blocks for noisy quantum computers

Prithviraj Prabhu

Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit. We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.

quant-pharXiv:2605.12385•May 13, 2026•0 citations
We analyze the accuracy of quantum phase gates acting on ``0-\ensuremathπ\ensuremath{\pi}\ensuremathπ qubits'' in superconducting circuits, where the gates are protected against thermal and Hamiltonian noise by continuous-variable quantum error-correcting codes. The gates are executed by turning on and off a tunable Josephson coupling between an LCLCLC oscillator and a qubit or pair of qubits; assuming perfect qubits, we show that the gate errors are exponentially small when the oscillator's impedance L/C\sqrt{L/C}L/C​ is large compared to \ensuremathℏ/4e2\ensuremath≈1k\ensuremathΩ\ensuremath{\hbar}/4{e}^{2}\ensuremath{\approx}1\phantom{\rule{4pt}{0ex}}\mathrm{k}\ensuremath{\Omega}\ensuremathℏ/4e2\ensuremath≈1k\ensuremathΩ. The protected gates are not computationally universal by themselves, but a scheme for universal fault-tolerant quantum computation can be constructed by combining them with unprotected noisy operations. We validate our analytic arguments with numerical simulations.
Protected superconducting qubits such as the 0- π qubit promise to substantially reduce physical error rates. However, a key challenge in the field is designing gates for these qubits that do not compromise their protection or become infeasibly slow as the protection of the qubit is improved. In this work we propose a protected phase gate that is compatible with the protected regime of the 0- π qubit and does not suffer from spurious coupling to additional circuit modes. Our gate utilizes an internal mode of the circuit as an ancilla and is achieved by varying the qubit-ancilla coupling via a tunable Josephson element. Through numerical simulations, we study how the gate error scales with the circuit parameters of the 0- π qubit and the tunable Josephson element that enacts the gate. Ultimately, we find that a protected gate with the 0- π qubit is possible with near-term circuit parameters. Our work opens up the possibility of performing protected gates on protected superconducting qubits, which may significantly reduce hardware overheads for quantum computation.
Bosonic quantum error correction represents a route towards significant hardware overhead reduction for fault-tolerant quantum computation. However, controlling quantum harmonic oscillators that encode the quantum information comes with its own challenges. In many platforms such as superconducting circuits and trapped ions, the bosonic degree of freedom is controlled by an ancillary qubit whose decay during a qubit-oscillator gate propagates to the oscillator as a continuous error. Such errors generally lie beyond the scope of errors that the bosonic code is capable of correcting. We introduce the continuous-variable flag: an auxiliary oscillator coupled to the ancilla whose phase-space position encodes the continuous error corrupting the storage mode. After the gate, a heterodyne measurement of the flag estimates this continuous-variable error and a subsequent feedback control undoes it up to a bosonic code stabilizer. The scheme requires no new ingredients, as the flag is driven by the same dispersive coupling, displacements and rotations that implement the gates it is supposed to protect. We construct sequences protecting conditional rotations to all orders in ancilla decay with one flag, and conditional displacements to first order with one flag and to all orders with two. Simulations with realistic circuit-QED parameters predict more than three orders of magnitude fewer logical errors for the parity measurement of a four-component cat code, and a finite-energy GKP logical lifetime near its noiseless-ancilla bound. By discretizing continuous-variable errors, the flags introduced in this work are a useful tool for any hybrid oscillator-qubit processor, and open the route towards fault-tolerant simulation and computation with bosonic modes.
We propose a qubit implementation based on exciton condensation in capacitively coupled Josephson junction chains. The qubit is protected in the sense that all unwanted terms in its effective Hamiltonian are exponentially suppressed as the chain length increases. We also describe an implementation of a universal set of quantum gates. Most gates also offer exponential error suppression. The only gate that is not intrinsically fault-tolerant needs to be realized with about 50% precision, provided the other gates are exact.
Abstract. We present a new hardware-efficient paradigm for universal quantum computation which is based on encoding, protecting and manipulating quantum information in a quantum harmonic oscillator. This proposal exploits multi-photon driven dissipative processes to encode quantum information in logical bases composed of Schrödinger cat states. More precisely, we consider two schemes. In a first scheme, a two-photon driven dissipative process is used to stabilize a logical qubit basis of two-component Schrödinger cat states. While such a scheme ensures a protection of the logical qubit against the photon dephasing errors, the prominent error channel of single-photon loss induces bit-flip type errors that cannot be corrected. Therefore, we consider a second scheme based on a four-photon driven dissipative process which leads to the choice of four-component Schrödinger cat states as the logical qubit. Such a logical qubit can be protected against single-photon loss by continuous photon number parity measurements. Next, applying some specific Hamiltonians, we provide a set of universal quantum gates on the encoded qubits of each of the two schemes. In particular, we illustrate how these operations can be rendered fault-tolerant with respect to various decoherence channels of participating quantum systems. Finally, we also propose experimental schemes based on quantum superconducting circuits and inspired by methods used in Josephson parametric amplification, which should allow to achieve these driven dissipative processes along with the Hamiltonians ensuring the universal operations in an efficient manner. ar
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit. We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.