We construct quantum circuits for measuring the commuting set of vertex and plaquette operators that appear in the Levin-Wen model for doubled Fibonacci anyons. Such measurements can be viewed as syndrome measurements for the quantum error-correcting code defined by the ground states of this model (the Fibonacci code). We quantify the complexity of these circuits with gate counts using different universal gate sets and find these measurements become significantly easier to perform if $n$-qubit Toffoli gates with $n=3,\phantom{\rule{0.28em}{0ex}}4$, and 5 can be carried out directly. In addition to measurement circuits, we construct simplified quantum circuits requiring only a few qubits that can be used to verify that certain self-consistency conditions, including the pentagon equation, are satisfied by the Fibonacci code.
We construct quantum circuits for measuring the commuting set of vertex and plaquette operators that appear in the Levin-Wen model for doubled Fibonacci anyons. Such measurements can be viewed as syndrome measurements for the quantum error-correcting code defined by the ground states of this model (the Fibonacci code). We quantify the complexity of these circuits with gate counts using different universal gate sets and find these measurements become significantly easier to perform if n-qubit Toffoli gates with n=3,4, and 5 can be carried out directly. In addition to measurement circuits, we construct simplified quantum circuits requiring only a few qubits that can be used to verify that certain self-consistency conditions, including the pentagon equation, are satisfied by the Fibonacci code.
The Fibonacci topological order is the prime candidate for the realization of universal topological quantum computation. We devise minimal quantum circuits to demonstrate the non-Abelian nature of the doubled Fibonacci topological order, as realized in the Levin-Wen string net model. Our circuits effectively initialize the ground state, create excitations, twist and braid them, all in the smallest lattices possible. We further design methods to determine the fusion amplitudes and braiding phases of multiple excitations by carrying out a single qubit measurement. We show that the fusion channels of the doubled Fibonacci model can be detected using only three qubits, twisting phases can be measured using five, and braiding can be demonstrated using nine qubits. These designs provide the simplest possible settings for demonstrating the properties of Fibonacci anyons and can be used as realistic blueprints for implementation on many modern quantum architectures.
One potential route toward fault-tolerant universal quantum computation is to use non-Abelian topological codes. In this work, we investigate how to achieve this goal with the quantum double model D(S3) . By embedding each on-site Hilbert space into a qubit-qutrit pair, we explicitly construct circuits for creating, moving, and locally measuring all non-trivial anyons. We also design a specialized anyon interferometer to remotely measure the total charge of well-separated anyons; this avoids fusion, which compromises fault tolerance. These protocols enable the implementation of a universal gate set proposed by Cui et al. and active correction of the circuit-level noise during computation. To further suppress errors, we encode each physical degree of freedom of D(S3) into a novel error-correcting code, enabling fault-tolerant realization, at the logical level, of all gates in the anyon manipulation circuits. Our proposal offers a promising path to realize robust universal topological quantum computation in the NISQ era.
Abstract A key requirement for an effective quantum error correction (QEC) scheme is that the physical qubits have error rates below a certain threshold. The value of this threshold depends on the details of the specific QEC scheme, and its hardware-level implementation. This is especially important with parity-check circuits, which are the fundamental building blocks of QEC codes. The standard way of constructing the parity check circuit is using a universal set of gates, namely sequential CNOT gates, single-qubit rotations and measurements. We exploit the insight that a QEC code does not require universal logic gates, but can be simplified to perform the sole task of error detection and correction. By building gates that are fundamental to QEC, we can boost the threshold and ease the experimental demands on the physical hardware. We present a rigorous formalism for constructing and verifying the error behavior of these gates, linking the physical measurement of a process matrix to the abstract error models commonly used in QEC analysis. This allows experimentalists to directly map the gates used in their systems to thresholds derived for a broad-class of QEC codes. We give an example of these new constructions using the model system of two nuclear spins, coupled to an electron spin, showing the potential benefits of redesigning fundamental gate sets using QEC primitives, rather than traditional gate sets reliant on simple single and two-qubit gates.
The efficiency of compiling high-level quantum algorithms into instruction sets native to quantum computers defines the moment in the future when we will be able to solve interesting and important problems on quantum computers. In my work I focus on the new methods for compiling single qubit operations that appear in many quantum algorithms into single qubit operations natively supported by several popular architectures. In addition, I study several questions related to synthesis and optimization of multiqubit operations. \n \n \nWhen studying the single qubit case, I consider two native instruction sets. The first one is Clifford+T; it is supported by conventional quantum computers implementing fault tolerance protocols based on concatenated and surface codes, and by topological quantum computers based on Ising anyons. The second instruction set is the one supported by topological quantum computers based on Fibonacci anyons. I show that in both cases one can use the number theoretic structure of the problem and methods of computational algebraic number theory to achieve improvements over the previous state of the art by factors ranging from 10 to 1000 for instances of the problem interesting in practice. This order of improvement might make certain interesting quantum computations possible several years earlier. \n \n \nThe work related to multiqubit operations is on exact synthesis and optimization of Clifford+T and Clifford circuits. I show an exact synthesis algorithm for unitaries generated by Clifford+T circuits requiring exponentially less number of gates than previous state of the art. For Clifford circuits two directions are studied: the algorithm for finding optimal circuits acting on a small number of qubits and heuristics for larger circuits optimization. The techniques developed allows one to reduce the size of encoding and decoding circuits for quantum error correcting codes by 40-50\\% and also finds their applications in randomized benchmarking protocols.
Quantum computers promise to solve computational problems that are inaccessible to classical machines. The reliable execution of large-scale quantum algorithms requires robust operations in the presence of noise. Quantum error correction addresses this challenge by encoding quantum information redundantly across several physical qubits, such that errors can be detected and corrected during a computation. However, no single error-correcting code intrinsically supports an inherently robust, fault-tolerant implementation of all gates needed for universal quantum computing. Moreover, most modern approaches to both quantum error correction and the implementation of universal logical operations on encoded qubits rely on mid-circuit measurements and feed-forward control. These types of operations are technologically demanding, often slow, and prone to high error rates, and they limit the overall success probability of quantum algorithms. In this thesis, we develop fault-tolerant protocols and circuits for quantum error correction and universal logical computation, with an emphasis on implementations compatible with current hardware systems. We first focus on fault-tolerant quantum error correction on small codes. By comparing different protocols, we identify trade-offs between compact circuit constructions and their robustness to noise. We then assess their practical performance by comparing numerical simulations of noisy circuits with experimental data. Beyond the preservation of encoded information, we study how universal logic can be implemented in a fault-tolerant manner on encoded qubits. A central approach considered in this thesis is code switching, in which logical information is transferred between two distinct error-correcting codes that support complementary sets of inherently fault-tolerant logical gates. In combination, these codes give access to a complete universal fault-tolerant logical gate set. In this thesis, we determine conditions that allow us to construct fault-tolerant protocols for code switching. We adapt these protocols to the capabilities of current hardware, thereby enabling the first experimental realization of universal fault-tolerant logic by means of code switching. However, the overall performance of these schemes is limited by slow and noisy mid-circuit measurements. To address this bottleneck, we construct a suite of measurement-free fault-tolerant universal operations that do not require any measurements during the execution of an algorithm. In this framework, error correction and logical operations are implemented coherently as part of the quantum circuit, without mid-circuit measurements or in-sequence classical control. We introduce measurement-free code-switching schemes that can be scaled to arbitrary code distances through concatenation, and which thereby provide, in principle, arbitrarily strong error suppression. We further tailor our approach to the capabilities of current trapped-ion quantum processors. New circuit constructions support the first experimental implementation of a logical quantum algorithm without mid-circuit measurements, demonstrated through Grover's search on three encoded qubits. Together, the results of this thesis expand the toolbox for early fault-tolerant quantum computation. They show how protocols for quantum error correction and universal logical gates can be designed without mid-circuit measurements with realistic hardware constraints in mind, opening new pathways towards universal quantum logic.
In this work we establish lower bounds on the size of Clifford circuits that measure a family of commuting Pauli operators. Our bounds depend on the interplay between a pair of graphs: the Tanner graph of the set of measured Pauli operators, and the connectivity graph which represents the qubit connections required to implement the circuit. For local-expander quantum codes, which are promising for low-overhead quantum error correction, we prove that any syndrome extraction circuit implemented with local Clifford gates in a 2D square patch of N qubits has depth at least Ω(n/N) where n is the code length. Then, we propose two families of quantum circuits saturating this bound. First, we construct 2D local syndrome extraction circuits for quantum LDPC codes with bounded depth using only O(n2) ancilla qubits. Second, we design a family of 2D local syndrome extraction circuits for hypergraph product codes using O(n) ancilla qubits with depth O(n). Finally, we use circuit noise simulations to compare the performance of a family of hypergraph product codes using this last family of 2D syndrome extraction circuits with a syndrome extraction circuit implemented with fully connected qubits. While there is a threshold of about 10−3 for a fully connected implementation, we observe no threshold for the 2D local implementation despite simulating error rates of as low as 10−6. This suggests that quantum LDPC codes are impractical with 2D local quantum hardware. We believe that our proof technique is of independent interest and could find other applications. Our bounds on circuit sizes are derived from a lower bound on the amount of correlations between two subsets of qubits of the circuit and an upper bound on the amount of correlations introduced by each circuit gate, which together provide a lower bound on the circuit size.