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arXiv:0906.0729 · Physical Review A

Optimal control of the silicon-based donor-electron-spin quantum computing

Dong-Bang Tsai, Po‐Wen Chen, Hsi‐Sheng Goan

Published Jun 17, 2009• 17 citations
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Abstract

We demonstrate how gradient ascent pulse engineering optimal control methods can be implemented on donor-electron-spin qubits in Si semiconductors with an architecture complementary to the original Kane's proposal. We focus on the high-fidelity-controlled-NOT (CNOT) gate and explicitly find its digitized control sequences by optimizing its fidelity over the external controls of the hyperfine $A$ and exchange $J$ interactions. This high-fidelity-CNOT gate has an error of about ${10}^{\ensuremath{-}6}$, below the error threshold required for fault-tolerant quantum computation, and its operation time of 100 ns is about three times faster than 297 ns of the proposed global control scheme. It also relaxes significantly the stringent distance constraint of two neighboring donor atoms of 10--20 nm as reported in the original Kane's proposal to about 30 nm in which surface $A$ and $J$ gates may be built with current fabrication technology. The effects of the control voltage fluctuations, the dipole-dipole interaction, and the electron-spin decoherence on the CNOT gate fidelity are also discussed.

DOI
10.1103/physreva.79.060306

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We demonstrate how gradient ascent pulse engineering optimal control methods can be implemented on donor-electron-spin qubits in Si semiconductors with an architecture complementary to the original Kane's proposal. We focus on the high-fidelity-controlled-NOT (CNOT) gate and explicitly find its digitized control sequences by optimizing its fidelity over the external controls of the hyperfine AAA and exchange JJJ interactions. This high-fidelity-CNOT gate has an error of about 10\ensuremath−6{10}^{\ensuremath{-}6}10\ensuremath−6, below the error threshold required for fault-tolerant quantum computation, and its operation time of 100 ns is about three times faster than 297 ns of the proposed global control scheme. It also relaxes significantly the stringent distance constraint of two neighboring donor atoms of 10--20 nm as reported in the original Kane's proposal to about 30 nm in which surface AAA and JJJ gates may be built with current fabrication technology. The effects of the control voltage fluctuations, the dipole-dipole interaction, and the electron-spin decoherence on the CNOT gate fidelity are also discussed.
In this paper, we demonstrate how gradient ascent pulse engineering (GRAPE) optimal control methods can be implemented on donor electron spin qubits in semiconductors with an architecture complementary to the original Kane’s proposal. We focus on the high fidelity controlled‐NOT (CNOT) gate and we explicitly find the digitized control sequences for a controlled‐NOT gate by optimizing its fidelity using the effective, reduced donor electron spin Hamiltonian with external controls over the hyperfine A and exchange J interactions. We then simulate the CNOT‐gate sequence with the full spin Hamiltonian and find that it has an error of 10−6 that is below the error threshold of 10−4 required for fault‐tolerant quantum computation. Also the CNOT gate operation time of 100 ns is 3 times faster than 297 ns of the proposed global control scheme.
We investigate how pulse-sequences and operation times of elementary quantum gates can be optimized for silicon-based donor electron spin quantum computer architecture, complementary to the original Kane's nuclear spin proposal. This gate-sequence-optimal or time-optimal quantum gate control in a quantum circuit is in addition to the more conventional concept of optimality in terms of the number of elementary gates needed in a quantum transformation. The optimal control method we use is the so-called gradient ascent pulse engineering (GRAPE) scheme. We focus on the high fidelity controlled-NOT (CNOT) gate and explicitly find the digitized control sequences by optimizing the effective, reduced donor electron spin Hamiltonian, with external controls over the hyperfine A and exchange J interactions. We first try different piecewise constant control steps and numerically calculate the fidelity (error) against the time needed to implement a CNOT gate with stopping criteria of error in the optimizer set to 〖10〗^(-9) in order to economize the simulation time. Here, the error is defined as 1-F, where F is fidelity. The error is less than 〖10〗^(-8) for times longer than 100ns, and it is found that 30 piecewise constant control steps for the CNOT gate operation will be sufficient to meet the required fidelity (error), and the performance would not be improved further with more steps. With operation time t=100ns and stopping criteria of error set to 〖10〗^(-16), we can find that the near time-optimal, high-fidelity CNOT gate control sequence has an error of 〖1.11×10〗^(-16). We then simulate the control sequences of the CNOT gate, obtained from reduced Hamiltonian simulations, with the full spin Hamiltonian. We find the error of about 〖10〗^(-6) which is below the error threshold required for fault-tolerant (〖10〗^(-4)) quantum computation. The CNOT gate operation time of 100ns is 3 times faster than the globally controlled electron spin scheme of 297ns. One of the great advantages of this near optimal-time high fidelity CNOT gate is that the exchange interaction is not required to be strong (the maximum value is J/h=20MHz compared to the typical value of 10.2GHz. This relaxes significantly the stringent distance constraint of two neighboring donor atoms of about 10nm as reported in the original Kane's proposal to be about 30nm which is within the reach of the current fabrication technology.
We propose a scheme for quantum information processing based on donor electron spins in semiconductors, with an architecture complementary to the original Kane proposal. We show that a na\"{\i}ve implementation of electron spin qubits provides only modest improvement over the Kane scheme, however through the introduction of global gate control we are able to take full advantage of the fast electron evolution timescales. We estimate that the latent clock speed is 100--1000 times that of the nuclear spin quantum computer with the ratio T2∕Tops{T}_{2}∕{T}_{\mathrm{ops}}T2​∕Tops​ approaching the 106{10}^{6}106 level.
A two-qubit controlled-not (cnot) gate, realized by a controlled-phase (C-phase) gate combined with single-qubit gates, has been experimentally implemented recently for quantum-dot spin qubits in isotopically enriched silicon, a promising solid-state system for practical quantum computation. In the experiments, the single-qubit gates have been demonstrated with fault-tolerant control fidelity, but the infidelity of the two-qubit C-phase gate is, primarily due to the electrical noise, still higher than the required error threshold for fault-tolerant quantum computation (FTQC). Here, by taking the realistic system parameters and the experimental constraints on the control pulses into account, we construct experimentally realizable high-fidelity cnot gates robust against electrical noise with the experimentally measured 1/f1.011/{f}^{1.01}1/f1.01 noise spectrum and also against the uncertainty in the interdot tunnel coupling amplitude. Our fine-tuned optimal cnot gate has about two orders of magnitude improvement in gate infidelity over the ideal C-phase gate constructed without considering any noise effect. Furthermore, within the same control framework, high-fidelity and robust single-qubit gates can also be constructed, paving the way for large-scale FTQC.
Silicon-based donor flip-flop qubits offer a promising path toward scalable, fault-tolerant quantum computing by combining the long coherence times of nuclear spins with fast, fully electrical control and long-range dipole-dipole coupling between qubits. However, realizing high-fidelity entangling operations in this platform remains challenging. The entangling interaction is intrinsically coupled to electron orbital dynamics, which can lead to leakage into non-computational states and unwanted phase accumulation. Furthermore, in multi-qubit architectures, residual dipolar couplings from spectator qubits distort the effective interaction landscape. In this work, we employ a numerical simulation framework, FlipFlopQSim, that models the spin-orbital dynamics of interacting flip-flop qubits to extract effective logical operations from realistic electrical control pulses. Using Makhlin invariants, we map the entangling landscape generated by electrically controlled dipole-dipole interactions and identify operating regions locally equivalent to canonical two-qubit gates, such as iSWAP\sqrt{iSWAP}iSWAP​ and iSWAPiSWAPiSWAP. We then optimize the control parameters of physically realizable, electrically driven RzR_zRz​ rotations to implement the necessary local corrections and maximize composite gate fidelity. Finally, we scale our analysis to multi-qubit registers with various geometries and connectivity patterns to evaluate spectator-induced distortions. Our results demonstrate that high-fidelity entangling operations cannot be optimized in isolation; rather, they require a co-design approach that simultaneously optimizes pulse control, local phase compensation, and physical device geometry. This work provides a robust numerical framework for assessing the scalability of electrically controlled silicon quantum processors and outlines key design principles for robust multi-qubit gate implementation.
We demonstrate how using two-qubit composite rotations a high fidelity controlled-NOT (CNOT) gate can be constructed, even when the strength of the interaction between qubits is not accurately known. We focus on the exchange interaction oscillation in silicon based solid-state architectures with a Heisenberg Hamiltonian. This method easily applies to a general two-qubit Hamiltonian. We show how the robust CNOT gate can achieve a very high fidelity when a single application of the composite rotations is combined with a modest level of Hamiltonian characterization. Operating the robust CNOT gate in a suitably characterized system means concatenation of the composite pulse is unnecessary, hence reducing operation time, and ensuring the gate operates below the threshold required for fault-tolerant quantum computation.