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arXiv:0706.0967 · Journal of Physics A Mathematical and Theoretical

Elementary gates for cartoon computation

Marek Czachor

Published Jul 19, 2007• 7 citations
arXivHTMLPDF

Abstract

The basic one-bit gates ( X , Y , Z , Hadamard, phase, π/8) as well as the controlled CNOT and Toffoli gates are reformulated in the language of geometric-algebra quantum-like computation. Thus, all the quantum algorithms can be reformulated in purely geometric terms without any need of tensor products.
DOI
10.1088/1751-8113/40/31/f01

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We present a computational framework based on geometric structures. No quantum mechanics is involved, and yet the algorithms perform tasks analogous to quantum computation. Tensor products and entangled states are not needed -- they are replaced by sets of basic shapes. To test the formalism we solve in geometric terms the Deutsch-Jozsa problem, historically the first example that demonstrated the potential power of quantum computation. Each step of the algorithm has a clear geometric interpetation and allows for a cartoon representation.
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A quantum gate is the quantum analog of the classical logic gate of digital computers. It is a basic structural unit of a quantum circuit which operates on a small number of qubits to deliver a predefined output. A quantum circuit is a graphical representation of the sequence of the quantum gates used and the measurements performed in a quantum computation. Various quantum logic gates, namely, the Hadamard, T phase, NOT, Pauli-X, controlled NOT (CNOT), controlled-Z, SWAP and controlled phase gates as well as higher-level Toffoli and Fredkin gates are described. Conventions of reading quantum circuit diagrams are explained. Operation of a quantum full adder consisting of registers and gates is discussed, elaborating the role of the NOT gate, the sum calculation with CNOTgates and the carry C-out calculation with Toffoli gates. A primary tool used for performing arithmetic operations on a quantum computer is the quantum Fourier transform (QFT). The QFT adder and multiplier circuits are presented.